diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..cd79c31 --- /dev/null +++ b/.gitignore @@ -0,0 +1,8 @@ +*.o +*.new +src/* +build/* +as-4.1.0/asxmak/darwin/build/* +as-4.1.0/asxmak/linux/build/* +as-4.1.0/asxmak/darwin/exe/* +as-4.1.0/asxmak/linux/exe/* diff --git a/as-4.1.0/as6309/m09adr.c b/as-4.1.0/as6309/m09adr.c new file mode 100644 index 0000000..276acdd --- /dev/null +++ b/as-4.1.0/as6309/m09adr.c @@ -0,0 +1,285 @@ +/* M09ADR:C */ + +/* + * (C) Copyright 1989-2006 + * All Rights Reserved + * + * Alan R. Baldwin + * 721 Berkeley St. + * Kent, Ohio 44240 + */ + +#include "asxxxx.h" +#include "m6309.h" + +int aindx; + +int +addr(esp) +struct expr *esp; +{ + int c; + + aindx = 0; + if ((c = getnb()) == '#') { + expr(esp, 0); + esp->e_mode = S_IMMED; + } else + if (c == '[') { + aindx = 0x90; + addr1(esp); + if (getnb() != ']') { + aerr(); + } + } else { + unget(c); + addr1(esp); + } + return (esp->e_mode); +} + +int +addr1(esp) +struct expr *esp; +{ + int c; + + if (admode(abd)) { + comma(); + if (!admode(xyus)) + aerr(); + esp->e_mode = S_IND; + } else + if ((c = getnb()) == ',') { + if (admode(xyus)) { + aindx |= 0x04; + } else + if (admode(auto2)) { + ; + } else + if (!(aindx & 0x10) && admode(auto1)) { + ; + } else { + aerr(); + } + esp->e_mode = S_IND; + } else + if (c == '*') { + expr(esp, 0); + esp->e_mode = S_DIR; + if ((c = getnb()) == ',') { + if (admode(xyus)) { + esp->e_mode = S_OFST; + } else + if (admode(pcr)) { + esp->e_mode = S_PCR; + } else + if (admode(pc)) { + esp->e_mode = S_PC; + } else { + aerr(); + } + } else { + unget(c); + } + } else { + unget(c); + expr(esp, 0); + if ((c = getnb()) == ',') { + if (admode(xyus)) { + esp->e_mode = S_OFST; + } else + if (admode(pcr)) { + esp->e_mode = S_PCR; + } else + if (admode(pc)) { + esp->e_mode = S_PC; + } else { + aerr(); + } + } else { + unget(c); + esp->e_mode = S_EXT; + } + } + return (esp->e_mode); +} + + +/* + * Enter admode() to search a specific addressing mode table + * for a match. Return the addressing value on a match or + * zero for no match. + */ +int +admode(sp) +struct adsym *sp; +{ + char *ptr; + int i, v; + char *ips; + + ips = ip; + unget(getnb()); + + i = 0; + while ( *(ptr = &sp[i].a_str[0]) ) { + if (srch(ptr)) { + v = sp[i].a_val; + aindx |= (v | 0x80); + return(v); + } + i++; + } + ip = ips; + return(0); +} + +/* + * srch --- does string match ? + */ +int +srch(str) +char *str; +{ + char *ptr; + ptr = ip; + + while (*ptr && *str) { + if (ccase[*ptr & 0x007F] != ccase[*str & 0x007F]) + break; + ptr++; + str++; + } + if (ccase[*ptr & 0x007F] == ccase[*str & 0x007F]) { + ip = ptr; + return(1); + } + + if (!*str) + if (any(*ptr," \t\n,];")) { + ip = ptr; + return(1); + } + return(0); +} + +/* + * any --- does str contain c? + */ +int +any(c,str) +int c; +char *str; +{ + while (*str) + if(*str++ == c) + return(1); + return(0); +} + +struct adsym abd[] = { /* a, b, or d indexed offset */ + { "a", 0x06 }, + { "b", 0x05 }, + { "d", 0x0B }, + { "e", 0x07 }, + { "f", 0x0A }, + { "w", 0x0E }, + { "", 0x00 } +}; + +struct adsym xyus[] = { /* x, y, u, or s index register */ + { "x", 0x100 }, + { "y", 0x120 }, + { "u", 0x140 }, + { "s", 0x160 }, + { "", 0x000 } +}; + +struct adsym auto1[] = { /* auto increment/decrement by 1 */ + { "x+", 0x100 }, + { "-x", 0x102 }, + { "y+", 0x120 }, + { "-y", 0x122 }, + { "u+", 0x140 }, + { "-u", 0x142 }, + { "s+", 0x160 }, + { "-s", 0x162 }, + { "", 0x000 } +}; + +struct adsym auto2[] = { /* auto increment/decrement by 2 */ + { "x++", 0x101 }, + { "--x", 0x103 }, + { "y++", 0x121 }, + { "--y", 0x123 }, + { "u++", 0x141 }, + { "--u", 0x143 }, + { "s++", 0x161 }, + { "--s", 0x163 }, + { "", 0x000 } +}; + +struct adsym pc[] = { /* pc */ + { "pc", 0x0C }, + { "", 0x00 } +}; + +struct adsym pcr[] = { /* pc relative */ + { "pcr", 0x0C }, + { "", 0x00 } +}; + +struct adsym regs[] = { /* exg, tfr register coding */ + { "d", 0x100 }, + { "x", 0x101 }, + { "y", 0x102 }, + { "u", 0x103 }, + { "s", 0x104 }, + { "pc", 0x105 }, + { "w", 0x106 }, + { "v", 0x107 }, + { "a", 0x108 }, + { "b", 0x109 }, + { "cc", 0x10A }, + { "dp", 0x10B }, + { "0", 0x10C }, + { "00", 0x10D }, + { "e", 0x10E }, + { "f", 0x10F }, + { "", 0x000 } +}; + +struct adsym stks[] = { /* push/pull on system stack */ + { "cc", 0x01 }, + { "a", 0x02 }, + { "b", 0x04 }, + { "d", 0x06 }, + { "dp", 0x08 }, + { "x", 0x10 }, + { "y", 0x20 }, + { "u", 0x40 }, + { "pc", 0x80 }, + { "", 0x00 } +}; + +struct adsym stku[] = { /* push/pull on user stack */ + { "cc", 0x01 }, + { "a", 0x02 }, + { "b", 0x04 }, + { "d", 0x06 }, + { "dp", 0x08 }, + { "x", 0x10 }, + { "y", 0x20 }, + { "s", 0x40 }, + { "pc", 0x80 }, + { "", 0x00 } +}; + +struct adsym bittr[] = { + { "cc", 0x00 }, + { "a", 0x40 }, + { "b", 0x80 }, + { "", 0x00 } +}; + diff --git a/as-4.1.0/as6309/m09ext.c b/as-4.1.0/as6309/m09ext.c new file mode 100644 index 0000000..061afd4 --- /dev/null +++ b/as-4.1.0/as6309/m09ext.c @@ -0,0 +1,17 @@ +/* M09EXT:C */ + +/* + * (C) Copyright 1989-2006 + * All Rights Reserved + * + * Alan R. Baldwin + * 721 Berkeley St. + * Kent, Ohio 44240 + */ + +#include "asxxxx.h" +#include "m6309.h" + +char *cpu = "Hitachi 6309"; +int hilo = 1; +char *dsft = "asm"; diff --git a/as-4.1.0/as6309/m09mch.c b/as-4.1.0/as6309/m09mch.c new file mode 100644 index 0000000..d885bce --- /dev/null +++ b/as-4.1.0/as6309/m09mch.c @@ -0,0 +1,645 @@ +/* M09MCH:C */ + +/* + * (C) Copyright 1989-2006 + * All Rights Reserved + * + * Alan R. Baldwin + * 721 Berkeley St. + * Kent, Ohio 44240 + */ + +#include "asxxxx.h" +#include "m6309.h" + +#define NB 512 + +int *bp; +int bm; +int bb[NB]; + +/* + * Opcode Cycle Definitions + */ +#define OPCY_SDP ((char) (0xFF)) +#define OPCY_ERR ((char) (0xFE)) + +/* OPCY_NONE ((char) (0x80)) */ +/* OPCY_MASK ((char) (0x7F)) */ + +#define OPCY_INDX ((char) (0x40)) +#define OPCY_PSPL ((char) (0x20)) + +#define VALU_MASK ((char) (0x1F)) + +#define UN ((char) (OPCY_NONE | 0x00)) +#define P2 ((char) (OPCY_NONE | 0x01)) +#define P3 ((char) (OPCY_NONE | 0x02)) + +#define I3 ((char) (OPCY_INDX | 0x03)) +#define I4 ((char) (OPCY_INDX | 0x04)) +#define I5 ((char) (OPCY_INDX | 0x05)) +#define I6 ((char) (OPCY_INDX | 0x06)) +#define I7 ((char) (OPCY_INDX | 0x07)) + +#define PP ((char) (OPCY_PSPL | 0x05)) + +/* + * 6809 Cycle Count + * + * opcycles = m09pg1[opcode] + */ +static char m09pg1[256] = { +/*--*--* 0 1 2 3 4 5 6 7 8 9 A B C D E F */ +/*--*--* - - - - - - - - - - - - - - - - */ +/*00*/ 6,UN,UN, 6, 6,UN, 6, 6, 6, 6, 6,UN, 6, 6, 3, 6, +/*10*/ P2,P3, 2, 4,UN,UN, 5, 9,UN, 2, 3,UN, 3, 2, 8, 6, +/*20*/ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, +/*30*/ I4,I4,I4,I4,PP,PP,PP,PP,UN, 5, 3,15,20,11,UN,19, +/*40*/ 2,UN,UN, 2, 2,UN, 2, 2, 2, 2, 2,UN, 2, 2,UN, 2, +/*50*/ 2,UN,UN, 2, 2,UN, 2, 2, 2, 2, 2,UN, 2, 2,UN, 2, +/*60*/ I6,UN,UN,I6,I6,UN,I6,I6,I6,I6,I6,UN,I6,I6,I3,I6, +/*70*/ 7,UN,UN, 7, 7,UN, 7, 7, 7, 7, 7,UN, 7, 7, 4, 7, +/*80*/ 2, 2, 2, 4, 2, 2, 2,UN, 2, 2, 2, 2, 4, 7, 3,UN, +/*90*/ 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 4, 6, 7, 5, 5, +/*A0*/ I4,I4,I4,I6,I4,I4,I4,I4,I4,I4,I4,I4,I6,I7,I5,I5, +/*B0*/ 5, 5, 5, 7, 5, 5, 5, 5, 5, 5, 5, 5, 7, 8, 6, 6, +/*C0*/ 2, 2, 2, 4, 2, 2, 2,UN, 2, 2, 2, 2, 3,UN, 3,UN, +/*D0*/ 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 5, 5, +/*E0*/ I4,I4,I4,I6,I4,I4,I4,I4,I4,I4,I4,I4,I5,I5,I5,I5, +/*F0*/ 5, 5, 5, 7, 5, 5, 5, 5, 5, 5, 5, 5, 6, 6, 6, 6 +}; + +static char m09pg2[256] = { +/*--*--* 0 1 2 3 4 5 6 7 8 9 A B C D E F */ +/*--*--* - - - - - - - - - - - - - - - - */ +/*00*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*10*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*20*/ UN, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, +/*30*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,20, +/*40*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*50*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*60*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*70*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*80*/ UN,UN,UN, 5,UN,UN,UN,UN,UN,UN,UN,UN, 5,UN, 4,UN, +/*90*/ UN,UN,UN, 7,UN,UN,UN,UN,UN,UN,UN,UN, 7,UN, 6,UN, +/*A0*/ UN,UN,UN,I7,UN,UN,UN,UN,UN,UN,UN,UN,I7,UN,I6,I6, +/*B0*/ UN,UN,UN, 8,UN,UN,UN,UN,UN,UN,UN,UN, 8,UN, 7, 7, +/*C0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, 4,UN, +/*D0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, 6, 6, +/*E0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,I6,I6, +/*F0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, 7, 7 +}; + +static char m09pg3[256] = { +/*--*--* 0 1 2 3 4 5 6 7 8 9 A B C D E F */ +/*--*--* - - - - - - - - - - - - - - - - */ +/*00*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*10*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*20*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*30*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,20, +/*40*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*50*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*60*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*70*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*80*/ UN,UN,UN, 5,UN,UN,UN,UN,UN,UN,UN,UN, 5,UN,UN,UN, +/*90*/ UN,UN,UN, 7,UN,UN,UN,UN,UN,UN,UN,UN, 7,UN,UN,UN, +/*A0*/ UN,UN,UN,I7,UN,UN,UN,UN,UN,UN,UN,UN,I7,UN,UN,UN, +/*B0*/ UN,UN,UN, 8,UN,UN,UN,UN,UN,UN,UN,UN, 8,UN,UN,UN, +/*C0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*D0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*E0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*F0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN +}; + +static char *Page[3] = { + m09pg1, m09pg2, m09pg3 +}; + +static char m09idx[32] = { +/* ,R+ */ 2, /* ,R++ */ 3, +/* ,-R */ 2, /* ,--R */ 3, +/* ,R */ 0, /* B,R */ 1, +/* A,R */ 1, /* --- */ 0, +/* n,R (8)*/ 1, /* n,R (16)*/ 4, +/* --- */ 0, /* D,R */ 4, +/* n,PCR (8)*/ 1, /* n,PCR (16)*/ 5, +/* --- */ 0, /* --- */ 0, +/* --- */ 0, /* [,R++] */ 6, +/* --- */ 0, /* [,--R] */ 6, +/* [,R] */ 3, /* [B,R] */ 4, +/* [A,R] */ 4, /* --- */ 0, +/* [n,R] (8)*/ 4, /* [n,R] (16)*/ 7, +/* --- */ 0, /* [D,R] */ 7, +/* [n,PCR] (8)*/ 4, /* [n,PCR] (16)*/ 8, +/* --- */ 0, /* [n] */ 5 +}; + +static char m00cyc[24] = { + 12,12, 3, 3, 3, 5, 5, 5, + 5, 6, 6, 6, 6,12, 3, 3, + 3, 8, 6, 8, 6, 6, 6,20 +}; + + +/* + * Process a machine op. + */ +VOID +machine(mp) +struct mne *mp; +{ + int op, rf, cpg, c; + struct expr e1; + int t1, v1, v2; + struct area *espa; + char id[NCPS]; + + cpg = 0; + clrexpr(&e1); + op = (int) mp->m_valu; + switch (rf = mp->m_type) { + + case S_SDP: + opcycles = OPCY_SDP; + espa = NULL; + if (more()) { + expr(&e1, 0); + if (e1.e_flag == 0 && e1.e_base.e_ap == NULL) { + if (e1.e_addr & 0xFF) { + err('b'); + } + } + if ((c = getnb()) == ',') { + getid(id, -1); + espa = alookup(id); + if (espa == NULL) { + err('u'); + } + } else { + unget(c); + } + } + if (espa) { + outdp(espa, &e1, 0); + } else { + outdp(dot.s_area, &e1, 0); + } + lmode = SLIST; + break; + + case S_INH2: + cpg += 0x01; + + case S_INH1: + cpg += 0x10; + + case S_INH: + if (cpg) + outab(cpg); + outab(op); + break; + + case S_BRA: + expr(&e1, 0); + outab(op); + if (mchpcr(&e1)) { + v1 = (int) (e1.e_addr - dot.s_addr - 1); + if ((v1 < -128) || (v1 > 127)) + aerr(); + outab(v1); + } else { + outrb(&e1, R_PCR); + } + if (e1.e_mode != S_USER) + rerr(); + break; + + case S_LBRA: + cpg += 0x10; + + case S_LBSR: + expr(&e1, 0); + if (cpg) + outab(cpg); + outab(op); + if (mchpcr(&e1)) { + v1 = (int) (e1.e_addr - dot.s_addr - 2); + outaw(v1); + } else { + outrw(&e1, R_PCR); + } + if (e1.e_mode != S_USER) + aerr(); + break; + + case S_PULS: + v1 = 0; + do { + if ((t1 = admode(stks)) == 0 || v1 & t1) + aerr(); + v1 |= t1; + } while (more() && comma()); + outab(op); + outab(v1); + break; + + case S_PULU: + v1 = 0; + do { + if ((t1 = admode(stku)) == 0 || v1 & t1) + aerr(); + v1 |= t1; + } while (more() && comma()); + outab(op); + outab(v1); + break; + + case S_EXG: + v1 = admode(regs); + comma(); + v2 = admode(regs); + if ((v1 & 0x08) != (v2 & 0x08)) + aerr(); + outab(op); + outab((v1<<4)|v2); + break; + + case S_ACC: + t1 = addr(&e1); + if (t1 == S_IMMED) + e1.e_mode = S_IMB; + genout(cpg, op, rf, &e1); + break; + + case S_STR2: + cpg += 0x01; + + case S_STR1: + cpg += 0x10; + + case S_SOP: + case S_STR: + t1 = addr(&e1); + if (t1 == S_IMMED) + e1.e_mode = S_IMER; + genout(cpg, op, rf, &e1); + break; + + case S_LR2: + cpg += 0x01; + + case S_LR1: + cpg += 0x10; + + case S_LR: + t1 = addr(&e1); + if (t1 == S_IMMED) + e1.e_mode = S_IMW; + genout(cpg, op, rf, &e1); + break; + + case S_LEA: + t1 = addr(&e1); + if (aindx) { + genout(cpg, op, rf, &e1); + break; + } + aerr(); + break; + + case S_IMM2: + cpg += 0x01; + + case S_IMM1: + cpg += 0x10; + + case S_CC: + t1 = addr(&e1); + if (t1 == S_IMMED) { + e1.e_mode = S_IMB; + genout(cpg, op, rf, &e1); + break; + } + aerr(); + break; + + case S_6800: + m68out(op); + opcycles = m00cyc[op]; + break; + + default: + opcycles = OPCY_ERR; + err('o'); + break; + } + + if (opcycles == OPCY_NONE) { + v2 = 1; + opcycles = m09pg1[cb[0] & 0xFF]; + if ((opcycles & OPCY_NONE) && (opcycles & OPCY_MASK)) { + v2 += 1; + opcycles = Page[opcycles & OPCY_MASK][cb[1] & 0xFF]; + } + if (opcycles & OPCY_INDX) { + if (cb[v2] & 0x80) { + opcycles = (opcycles & VALU_MASK) + m09idx[cb[v2] & 0x1F]; + } else { + opcycles = (opcycles & VALU_MASK) + 1; + } + } else + if (opcycles & OPCY_PSPL) { + for (t1=0x01,v1=0; t1 < 0x0100; t1 <<= 1) { + if (cb[1] & t1) { + v1 += 1; + } + } + opcycles = (opcycles & VALU_MASK) + v1; + } + } +} + +/* + * General Output Routine + */ +VOID +genout(cpg, op, rf, esp) +int cpg, op, rf; +struct expr *esp; +{ + int espv; + struct area *espa; + int disp, flag; + + espv = (int) esp->e_addr; + espa = esp->e_base.e_ap; + switch (esp->e_mode) { + + case S_IMB: + if (cpg) + outab(cpg); + outab(op); + outrb(esp, R_NORM); + break; + + case S_IMW: + if (cpg) + outab(cpg); + outab(op); + outrw(esp, R_NORM); + break; + + case S_DIR: + if (cpg) + outab(cpg); + if (rf == S_SOP) { + outab(op&0x0F); + } else { + outab(op|0x10); + } + outrb(esp, R_PAGN); + break; + + case S_EXT: + if (cpg) + outab(cpg); + if (aindx) { + outab(op|0x20); + outab(aindx|0x0F); + outrw(esp, R_NORM); + break; + } + outab(op|0x30); + outrw(esp, R_NORM); + break; + + case S_IND: + if (cpg) + outab(cpg); + outab(op|0x20); + outab(aindx); + break; + + case S_PC: + if (espa) { + aerr(); + break; + } + if (cpg) + outab(cpg); + outab(op|0x20); + if (pass == 0) { + dot.s_addr += 3; + } else + if (pass == 1) { + if (esp->e_addr >= dot.s_addr) + esp->e_addr -= fuzz; + dot.s_addr += 2; + disp = (int) esp->e_addr; + flag = 0; + if (disp < -128 || disp > 127) + ++flag; + if (setbit(flag)) + ++dot.s_addr; + } else { + if (getbit()) { + outab(aindx|0x01); + outaw(espv); + } else { + outab(aindx); + outab(espv); + } + } + break; + + case S_PCR: + if (cpg) + outab(cpg); + outab(op|0x20); + if (pass == 0) { + dot.s_addr += 3; + } else + if (espa && espa != dot.s_area) { + outab(aindx|0x01); + outrw(esp, R_PCR); + } else + if (pass == 1) { + if (esp->e_addr >= dot.s_addr) + esp->e_addr -= fuzz; + dot.s_addr += 2; + disp = (int) (esp->e_addr - dot.s_addr); + flag = 0; + if (disp < -128 || disp > 127) + ++flag; + if (setbit(flag)) + ++dot.s_addr; + } else { + if (getbit()) { + outab(aindx|0x01); + disp = (int) (espv - dot.s_addr - 2); + outaw(disp); + } else { + outab(aindx); + disp = (int) (espv - dot.s_addr - 1); + outab(disp); + } + } + break; + + case S_OFST: + if (cpg) + outab(cpg); + outab(op|0x20); + if (pass == 0) { + dot.s_addr += 3; + } else + if (espa) { + outab(aindx|0x09); + outrw(esp, R_NORM); + } else + if (pass == 1) { + if (esp->e_addr >= dot.s_addr) + esp->e_addr -= fuzz; + dot.s_addr += 1; + flag = 0; + if (espv < -128 || espv > 127) + ++flag; + if (setbit(flag)) { + dot.s_addr += 2; + } else { + flag = aindx & 0x10; + if (espv < -16 || espv > 15) + ++flag; + if (setbit(flag)) + ++dot.s_addr; + } + } else { + if (getbit()) { + outab(aindx|0x09); + outaw(espv); + } else { + if (getbit()) { + outab(aindx|0x08); + outab(espv); + } else { + outab((aindx & 0x60) | (espv & 0x1F)); + } + } + } + break; + + case S_IMER: + default: + aerr(); + } +} + +/* + * mc6800 compatibility output routine + */ +VOID +m68out(i) +int i; +{ + char *ptr; + int j; + + ptr = (char *) &mc6800[i]; + for (j=0; j<4 ; j++) { + if ((i = *ptr++) != 0) { + outab(i); + } else { + break; + } + } +} + +/* + * Branch/Jump PCR Mode Check + */ +int +mchpcr(esp) +struct expr *esp; +{ + if (esp->e_base.e_ap == dot.s_area) { + return(1); + } + if (esp->e_flag==0 && esp->e_base.e_ap==NULL) { + /* + * Absolute Destination + * + * Use the global symbol '.__.ABS.' + * of value zero and force the assembler + * to use this absolute constant as the + * base value for the relocation. + */ + esp->e_flag = 1; + esp->e_base.e_sp = &sym[1]; + } + return(0); +} + +/* + * Machine specific initialization. + * Set up the bit table. + */ +VOID +minit() +{ + bp = bb; + bm = 1; +} + +/* + * Store `b' in the next slot of the bit table. + * If no room, force the longer form of the offset. + */ +int +setbit(b) +int b; +{ + if (bp >= &bb[NB]) + return(1); + if (b) + *bp |= bm; + bm <<= 1; + if (bm == 0) { + bm = 1; + ++bp; + } + return(b); +} + +/* + * Get the next bit from the bit table. + * If none left, return a `1'. + * This will force the longer form of the offset. + */ +int +getbit() +{ + register int f; + + if (bp >= &bb[NB]) + return (1); + f = *bp & bm; + bm <<= 1; + if (bm == 0) { + bm = 1; + ++bp; + } + return (f); +} + +/* + * The next character must be a + * comma. + */ +int +comma() +{ + if (getnb() != ',') + qerr(); + return(1); +} diff --git a/as-4.1.0/as6309/m09pst.c b/as-4.1.0/as6309/m09pst.c new file mode 100644 index 0000000..f4fdb8f --- /dev/null +++ b/as-4.1.0/as6309/m09pst.c @@ -0,0 +1,525 @@ +/* M09PST:C */ + +/* + * (C) Copyright 1989-2006 + * All Rights Reserved + * + * Alan R. Baldwin + * 721 Berkeley St. + * Kent, Ohio 44240 + */ + +#include "asxxxx.h" +#include "m6309.h" + +/* + * Coding Banks + */ +struct bank bank[2] = { + /* The '_CODE' area/bank has a NULL default file suffix. */ + { NULL, "_CSEG", NULL, 0, 0, 0, 0, 0 }, + { &bank[0], "_DSEG", "_DS", 1, 0, 0, 0, B_FSFX } +}; + +/* + * Coding Areas + */ +struct area area[2] = { + { NULL, &bank[0], "_CODE", 0, 0, 0, A_1BYTE|A_BNK|A_CSEG }, + { &area[0], &bank[1], "_DATA", 1, 0, 0, A_1BYTE|A_BNK|A_DSEG } +}; + +/* + * Basic Relocation Mode Definition + * + * #define R_NORM 0000 No Bit Positioning + */ +char mode0[32] = { /* R_NORM */ + '\200', '\201', '\202', '\203', '\204', '\205', '\206', '\207', + '\210', '\211', '\212', '\213', '\214', '\215', '\216', '\217', + '\220', '\221', '\222', '\223', '\224', '\225', '\226', '\227', + '\230', '\231', '\232', '\233', '\234', '\235', '\236', '\237' +}; + +/* + * Additional Relocation Mode Definitions + */ + +/* None Required */ + +/* + * *m_def is a pointer to the bit relocation definition. + * m_flag indicates that bit position swapping is required. + * m_mask contains the active bit positions for the output. + * m_mbro contains the active bit positions for the input. + * + * struct mode + * { + * char * m_def; Bit Relocation Definition + * int m_flag; Bit Swapping Flag + * int m_mask; Bit Mask + * int m_mbro; Bit Range Overflow Mask + * }; + */ +struct mode mode[1] = { + { &mode0[0], 0, 0x0000FFFF, 0x0000FFFF } +}; + +/* + * Array of Pointers to mode Structures + */ +struct mode *modep[16] = { + &mode[0], NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL +}; + +/* + * Mnemonic Structure + */ +struct mne mne[] = { + + /* machine */ + + { NULL, "CSEG", S_ATYP, 0, A_CSEG|A_1BYTE }, + { NULL, "DSEG", S_ATYP, 0, A_DSEG|A_1BYTE }, + + { NULL, ".setdp", S_SDP, 0, 0 }, + + /* system */ + + { NULL, "BANK", S_ATYP, 0, A_BNK }, + { NULL, "CON", S_ATYP, 0, A_CON }, + { NULL, "OVR", S_ATYP, 0, A_OVR }, + { NULL, "REL", S_ATYP, 0, A_REL }, + { NULL, "ABS", S_ATYP, 0, A_ABS }, + { NULL, "NOPAG", S_ATYP, 0, A_NOPAG }, + { NULL, "PAG", S_ATYP, 0, A_PAG }, + + { NULL, "BASE", S_BTYP, 0, B_BASE }, + { NULL, "SIZE", S_BTYP, 0, B_SIZE }, + { NULL, "FSFX", S_BTYP, 0, B_FSFX }, + { NULL, "MAP", S_BTYP, 0, B_MAP }, + + { NULL, ".page", S_PAGE, 0, 0 }, + { NULL, ".title", S_HEADER, 0, O_TITLE }, + { NULL, ".sbttl", S_HEADER, 0, O_SBTTL }, + { NULL, ".module", S_MODUL, 0, 0 }, + { NULL, ".include", S_INCL, 0, 0 }, + { NULL, ".area", S_AREA, 0, 0 }, + { NULL, ".bank", S_BANK, 0, 0 }, + { NULL, ".org", S_ORG, 0, 0 }, + { NULL, ".radix", S_RADIX, 0, 0 }, + { NULL, ".globl", S_GLOBL, 0, 0 }, + { NULL, ".local", S_LOCAL, 0, 0 }, + { NULL, ".if", S_CONDITIONAL, 0, O_IF }, + { NULL, ".else", S_CONDITIONAL, 0, O_ELSE }, + { NULL, ".endif", S_CONDITIONAL, 0, O_ENDIF }, + { NULL, ".ifdef", S_CONDITIONAL, 0, O_IFDEF }, + { NULL, ".ifndef", S_CONDITIONAL, 0, O_IFNDEF}, + { NULL, ".ifgt", S_CONDITIONAL, 0, O_IFGT }, + { NULL, ".iflt", S_CONDITIONAL, 0, O_IFLT }, + { NULL, ".ifge", S_CONDITIONAL, 0, O_IFGE }, + { NULL, ".ifle", S_CONDITIONAL, 0, O_IFLE }, + { NULL, ".ifeq", S_CONDITIONAL, 0, O_IFEQ }, + { NULL, ".ifne", S_CONDITIONAL, 0, O_IFNE }, + { NULL, ".list", S_LISTING, 0, O_LIST }, + { NULL, ".nlist", S_LISTING, 0, O_NLIST }, + { NULL, ".equ", S_EQU, 0, O_EQU }, + { NULL, ".gblequ", S_EQU, 0, O_GBLEQU}, + { NULL, ".lclequ", S_EQU, 0, O_LCLEQU}, + { NULL, ".byte", S_DATA, 0, O_1BYTE }, + { NULL, ".db", S_DATA, 0, O_1BYTE }, + { NULL, ".fcb", S_DATA, 0, O_1BYTE }, + { NULL, ".word", S_DATA, 0, O_2BYTE }, + { NULL, ".dw", S_DATA, 0, O_2BYTE }, + { NULL, ".fdb", S_DATA, 0, O_2BYTE }, +/* { NULL, ".3byte", S_DATA, 0, O_3BYTE }, */ +/* { NULL, ".triple", S_DATA, 0, O_3BYTE }, */ +/* { NULL, ".4byte", S_DATA, 0, O_4BYTE }, */ +/* { NULL, ".quad", S_DATA, 0, O_4BYTE }, */ + { NULL, ".blkb", S_BLK, 0, O_1BYTE }, + { NULL, ".ds", S_BLK, 0, O_1BYTE }, + { NULL, ".rmb", S_BLK, 0, O_1BYTE }, + { NULL, ".rs", S_BLK, 0, O_1BYTE }, + { NULL, ".blkw", S_BLK, 0, O_2BYTE }, +/* { NULL, ".blk3", S_BLK, 0, O_3BYTE }, */ +/* { NULL, ".blk4", S_BLK, 0, O_4BYTE }, */ + { NULL, ".ascii", S_ASCIX, 0, O_ASCII }, + { NULL, ".ascis", S_ASCIX, 0, O_ASCIS }, + { NULL, ".asciz", S_ASCIX, 0, O_ASCIZ }, + { NULL, ".str", S_ASCIX, 0, O_ASCII }, + { NULL, ".strs", S_ASCIX, 0, O_ASCIS }, + { NULL, ".strz", S_ASCIX, 0, O_ASCIZ }, + { NULL, ".fcc", S_ASCIX, 0, O_ASCII }, + { NULL, ".define", S_DEFINE, 0, O_DEF }, + { NULL, ".undefine", S_DEFINE, 0, O_UNDEF }, + { NULL, ".even", S_BOUNDARY, 0, O_EVEN }, + { NULL, ".odd", S_BOUNDARY, 0, O_ODD }, + { NULL, ".msg" , S_MSG, 0, 0 }, + { NULL, ".assume", S_ERROR, 0, O_ASSUME}, + { NULL, ".error", S_ERROR, 0, O_ERROR }, +/* { NULL, ".msb", S_MSB, 0, 0 }, */ +/* { NULL, ".8bit", S_BITS, 0, O_1BYTE }, */ +/* { NULL, ".16bit", S_BITS, 0, O_2BYTE }, */ +/* { NULL, ".24bit", S_BITS, 0, O_3BYTE }, */ +/* { NULL, ".32bit", S_BITS, 0, O_4BYTE }, */ + { NULL, ".end", S_END, 0, 0 }, + + /* 6800 Compatibility */ + + { NULL, "ldaa", S_ACC, 0, 0x86 }, + { NULL, "ldab", S_ACC, 0, 0xC6 }, + { NULL, "oraa", S_ACC, 0, 0x8A }, + { NULL, "orab", S_ACC, 0, 0xCA }, + { NULL, "staa", S_STR, 0, 0x87 }, + { NULL, "stab", S_STR, 0, 0xC7 }, + + /* if this is changed, change struct opdata mc6800[] */ + + { NULL, "aba", S_6800, 0, 0 }, + { NULL, "cba", S_6800, 0, 1 }, + { NULL, "clc", S_6800, 0, 2 }, + { NULL, "cli", S_6800, 0, 3 }, + { NULL, "clv", S_6800, 0, 4 }, + { NULL, "des", S_6800, 0, 5 }, + { NULL, "dex", S_6800, 0, 6 }, + { NULL, "ins", S_6800, 0, 7 }, + { NULL, "inx", S_6800, 0, 8 }, + { NULL, "psha", S_6800, 0, 9 }, + { NULL, "pshb", S_6800, 0, 10 }, + { NULL, "pula", S_6800, 0, 11 }, + { NULL, "pulb", S_6800, 0, 12 }, + { NULL, "sba", S_6800, 0, 13 }, + { NULL, "sec", S_6800, 0, 14 }, + { NULL, "sei", S_6800, 0, 15 }, + { NULL, "sev", S_6800, 0, 16 }, + { NULL, "tab", S_6800, 0, 17 }, + { NULL, "tap", S_6800, 0, 18 }, + { NULL, "tba", S_6800, 0, 19 }, + { NULL, "tpa", S_6800, 0, 20 }, + { NULL, "tsx", S_6800, 0, 21 }, + { NULL, "txs", S_6800, 0, 22 }, + { NULL, "wai", S_6800, 0, 23 }, + + /* 6809 */ + + { NULL, "sty", S_STR1, 0, 0x8F }, + { NULL, "sts", S_STR1, 0, 0xCF }, + + { NULL, "sta", S_STR, 0, 0x87 }, + { NULL, "stb", S_STR, 0, 0xC7 }, + { NULL, "std", S_STR, 0, 0xCD }, + { NULL, "stx", S_STR, 0, 0x8F }, + { NULL, "stu", S_STR, 0, 0xCF }, + { NULL, "jsr", S_STR, 0, 0x8D }, + + { NULL, "cmpu", S_LR2, 0, 0x83 }, + { NULL, "cmps", S_LR2, 0, 0x8C }, + + { NULL, "cmpd", S_LR1, 0, 0x83 }, + { NULL, "cmpy", S_LR1, 0, 0x8C }, + { NULL, "ldy", S_LR1, 0, 0x8E }, + { NULL, "lds", S_LR1, 0, 0xCE }, + + { NULL, "subd", S_LR, 0, 0x83 }, + { NULL, "addd", S_LR, 0, 0xC3 }, + { NULL, "cmpx", S_LR, 0, 0x8C }, + { NULL, "cpx", S_LR, 0, 0x8C }, + { NULL, "ldd", S_LR, 0, 0xCC }, + { NULL, "ldx", S_LR, 0, 0x8E }, + { NULL, "ldu", S_LR, 0, 0xCE }, + { NULL, "ldq", S_LRQ, 0, 0xCD }, + + { NULL, "leax", S_LEA, 0, 0x30 }, + { NULL, "leay", S_LEA, 0, 0x31 }, + { NULL, "leas", S_LEA, 0, 0x32 }, + { NULL, "leau", S_LEA, 0, 0x33 }, + + { NULL, "pshs", S_PULS, 0, 0x34 }, + { NULL, "puls", S_PULS, 0, 0x35 }, + { NULL, "pshu", S_PULU, 0, 0x36 }, + { NULL, "pulu", S_PULU, 0, 0x37 }, + + { NULL, "exg", S_EXG, 0, 0x1E }, + { NULL, "tfr", S_EXG, 0, 0x1F }, + + { NULL, "addr", S_IR, 0, 0x30 }, + { NULL, "adcr", S_IR, 0, 0x31 }, + { NULL, "subr", S_IR, 0, 0x32 }, + { NULL, "sbcr", S_IR, 0, 0x33 }, + { NULL, "andr", S_IR, 0, 0x34 }, + { NULL, "orr", S_IR, 0, 0x35 }, + { NULL, "eorr", S_IR, 0, 0x36 }, + { NULL, "cmpr", S_IR, 0, 0x37 }, + + { NULL, "cwai", S_CC, 0, 0x3C }, + { NULL, "orcc", S_CC, 0, 0x1A }, + { NULL, "andcc", S_CC, 0, 0x1C }, + + { NULL, "swi3", S_INH2, 0, 0x3F }, + { NULL, "swi2", S_INH1, 0, 0x3F }, + { NULL, "swi1", S_INH, 0, 0x3F }, + + { NULL, "abx", S_INH, 0, 0x3A }, + { NULL, "asla", S_INH, 0, 0x48 }, + { NULL, "aslb", S_INH, 0, 0x58 }, + { NULL, "asra", S_INH, 0, 0x47 }, + { NULL, "asrb", S_INH, 0, 0x57 }, + { NULL, "clra", S_INH, 0, 0x4F }, + { NULL, "clrb", S_INH, 0, 0x5F }, + { NULL, "coma", S_INH, 0, 0x43 }, + { NULL, "comb", S_INH, 0, 0x53 }, + { NULL, "daa", S_INH, 0, 0x19 }, + { NULL, "deca", S_INH, 0, 0x4A }, + { NULL, "decb", S_INH, 0, 0x5A }, + { NULL, "inca", S_INH, 0, 0x4C }, + { NULL, "incb", S_INH, 0, 0x5C }, + { NULL, "lsla", S_INH, 0, 0x48 }, + { NULL, "lslb", S_INH, 0, 0x58 }, + { NULL, "lsra", S_INH, 0, 0x44 }, + { NULL, "lsrb", S_INH, 0, 0x54 }, + { NULL, "mul", S_INH, 0, 0x3D }, + { NULL, "nega", S_INH, 0, 0x40 }, + { NULL, "negb", S_INH, 0, 0x50 }, + { NULL, "nop", S_INH, 0, 0x12 }, + { NULL, "rola", S_INH, 0, 0x49 }, + { NULL, "rolb", S_INH, 0, 0x59 }, + { NULL, "rora", S_INH, 0, 0x46 }, + { NULL, "rorb", S_INH, 0, 0x56 }, + { NULL, "rti", S_INH, 0, 0x3B }, + { NULL, "rts", S_INH, 0, 0x39 }, + { NULL, "sex", S_INH, 0, 0x1D }, + { NULL, "swi", S_INH, 0, 0x3F }, + { NULL, "sync", S_INH, 0, 0x13 }, + { NULL, "tsta", S_INH, 0, 0x4D }, + { NULL, "tstb", S_INH, 0, 0x5D }, + + { NULL, "lbrn", S_LBRA, 0, 0x21 }, + { NULL, "lbhi", S_LBRA, 0, 0x22 }, + { NULL, "lbls", S_LBRA, 0, 0x23 }, + { NULL, "lblos", S_LBRA, 0, 0x23 }, + { NULL, "lbcc", S_LBRA, 0, 0x24 }, + { NULL, "lbhs", S_LBRA, 0, 0x24 }, + { NULL, "lbhis", S_LBRA, 0, 0x24 }, + { NULL, "lbcs", S_LBRA, 0, 0x25 }, + { NULL, "lblo", S_LBRA, 0, 0x25 }, + { NULL, "lbne", S_LBRA, 0, 0x26 }, + { NULL, "lbeq", S_LBRA, 0, 0x27 }, + { NULL, "lbvc", S_LBRA, 0, 0x28 }, + { NULL, "lbvs", S_LBRA, 0, 0x29 }, + { NULL, "lbpl", S_LBRA, 0, 0x2A }, + { NULL, "lbmi", S_LBRA, 0, 0x2B }, + { NULL, "lbge", S_LBRA, 0, 0x2C }, + { NULL, "lblt", S_LBRA, 0, 0x2D }, + { NULL, "lbgt", S_LBRA, 0, 0x2E }, + { NULL, "lble", S_LBRA, 0, 0x2F }, + + { NULL, "lbra", S_LBSR, 0, 0x16 }, + { NULL, "lbsr", S_LBSR, 0, 0x17 }, + + { NULL, "neg", S_SOP, 0, 0x40 }, + { NULL, "oim", S_SOP, 0, 0x41 }, + { NULL, "aim", S_SOP, 0, 0x42 }, + { NULL, "com", S_SOP, 0, 0x43 }, + { NULL, "lsr", S_SOP, 0, 0x44 }, + { NULL, "eim", S_SOP, 0, 0x45 }, + { NULL, "ror", S_SOP, 0, 0x46 }, + { NULL, "asr", S_SOP, 0, 0x47 }, + { NULL, "asl", S_SOP, 0, 0x48 }, + { NULL, "lsl", S_SOP, 0, 0x48 }, + { NULL, "rol", S_SOP, 0, 0x49 }, + { NULL, "dec", S_SOP, 0, 0x4A }, + { NULL, "tim", S_SOP, 0, 0x4B }, + { NULL, "inc", S_SOP, 0, 0x4C }, + { NULL, "tst", S_SOP, 0, 0x4D }, + { NULL, "clr", S_SOP, 0, 0x4F }, + { NULL, "jmp", S_SOP, 0, 0x4E }, + + { NULL, "suba", S_ACC, 0, 0x80 }, + { NULL, "subb", S_ACC, 0, 0xC0 }, + { NULL, "cmpa", S_ACC, 0, 0x81 }, + { NULL, "cmpb", S_ACC, 0, 0xC1 }, + { NULL, "sbca", S_ACC, 0, 0x82 }, + { NULL, "sbcb", S_ACC, 0, 0xC2 }, + { NULL, "anda", S_ACC, 0, 0x84 }, + { NULL, "andb", S_ACC, 0, 0xC4 }, + { NULL, "bita", S_ACC, 0, 0x85 }, + { NULL, "bitb", S_ACC, 0, 0xC5 }, + { NULL, "lda", S_ACC, 0, 0x86 }, + { NULL, "ldb", S_ACC, 0, 0xC6 }, + { NULL, "eora", S_ACC, 0, 0x88 }, + { NULL, "eorb", S_ACC, 0, 0xC8 }, + { NULL, "adca", S_ACC, 0, 0x89 }, + { NULL, "adcb", S_ACC, 0, 0xC9 }, + { NULL, "ora", S_ACC, 0, 0x8A }, + { NULL, "orb", S_ACC, 0, 0xCA }, + { NULL, "adda", S_ACC, 0, 0x8B }, + { NULL, "addb", S_ACC, 0, 0xCB }, + + { NULL, "bra", S_BRA, 0, 0x20 }, + { NULL, "brn", S_BRA, 0, 0x21 }, + { NULL, "bhi", S_BRA, 0, 0x22 }, + { NULL, "bls", S_BRA, 0, 0x23 }, + { NULL, "blos", S_BRA, 0, 0x23 }, + { NULL, "bcc", S_BRA, 0, 0x24 }, + { NULL, "bhs", S_BRA, 0, 0x24 }, + { NULL, "bhis", S_BRA, 0, 0x24 }, + { NULL, "bcs", S_BRA, 0, 0x25 }, + { NULL, "blo", S_BRA, 0, 0x25 }, + { NULL, "bne", S_BRA, 0, 0x26 }, + { NULL, "beq", S_BRA, 0, 0x27 }, + { NULL, "bvc", S_BRA, 0, 0x28 }, + { NULL, "bvs", S_BRA, 0, 0x29 }, + { NULL, "bpl", S_BRA, 0, 0x2A }, + { NULL, "bmi", S_BRA, 0, 0x2B }, + { NULL, "bge", S_BRA, 0, 0x2C }, + { NULL, "blt", S_BRA, 0, 0x2D }, + { NULL, "bgt", S_BRA, 0, 0x2E }, + { NULL, "ble", S_BRA, 0, 0x2F }, + + /* New to the 6309 - prebyte 0x10 */ + + { NULL, "negd", S_INH1, 0, 0x40 }, + { NULL, "comd", S_INH1, 0, 0x43 }, + { NULL, "lsrd", S_INH1, 0, 0x44 }, + { NULL, "rord", S_INH1, 0, 0x46 }, + { NULL, "asrd", S_INH1, 0, 0x47 }, + { NULL, "asld", S_INH1, 0, 0x48 }, + { NULL, "rold", S_INH1, 0, 0x49 }, + { NULL, "decd", S_INH1, 0, 0x4A }, + { NULL, "incd", S_INH1, 0, 0x4C }, + { NULL, "tstd", S_INH1, 0, 0x4D }, + { NULL, "clrd", S_INH1, 0, 0x4F }, + + { NULL, "comw", S_INH1, 0, 0x53 }, + { NULL, "lsrw", S_INH1, 0, 0x54 }, + { NULL, "rorw", S_INH1, 0, 0x56 }, + { NULL, "rolw", S_INH1, 0, 0x59 }, + { NULL, "decw", S_INH1, 0, 0x5A }, + { NULL, "incw", S_INH1, 0, 0x5C }, + { NULL, "tstw", S_INH1, 0, 0x5D }, + { NULL, "clrw", S_INH1, 0, 0x5F }, + + { NULL, "subw", S_LR1, 0, 0x80 }, + { NULL, "cmpw", S_LR1, 0, 0x81 }, + { NULL, "sbcd", S_LR1, 0, 0x82 }, + { NULL, "andd", S_LR1, 0, 0x84 }, + { NULL, "bitd", S_LR1, 0, 0x85 }, + { NULL, "ldw", S_LR1, 0, 0x86 }, + { NULL, "stw", S_STR1, 0, 0x87 }, + { NULL, "eord", S_LR1, 0, 0x88 }, + { NULL, "adcd", S_LR1, 0, 0x89 }, + { NULL, "ord", S_LR1, 0, 0x8A }, + { NULL, "addw", S_LR1, 0, 0x8B }, + + /* New to the 6309 - prebyte 0x11 */ + + { NULL, "bitmd", S_IMM2, 0, 0x3C }, + { NULL, "ldmd", S_IMM2, 0, 0x3D }, + + { NULL, "come", S_INH2, 0, 0x43 }, + { NULL, "dece", S_INH2, 0, 0x4A }, + { NULL, "ince", S_INH2, 0, 0x4C }, + { NULL, "tste", S_INH2, 0, 0x4D }, + { NULL, "clre", S_INH2, 0, 0x4F }, + + { NULL, "comf", S_INH2, 0, 0x53 }, + { NULL, "decf", S_INH2, 0, 0x5A }, + { NULL, "incf", S_INH2, 0, 0x5C }, + { NULL, "tstf", S_INH2, 0, 0x5D }, + { NULL, "clrf", S_INH2, 0, 0x5F }, + + { NULL, "sube", S_LR2, 0, 0x80 }, + { NULL, "cmpe", S_LR2, 0, 0x81 }, + { NULL, "lde", S_LR2, 0, 0x86 }, + { NULL, "ste", S_STR2, 0, 0x87 }, + { NULL, "adde", S_LR2, 0, 0x8B }, + { NULL, "divd", S_LR2, 0, 0x8D }, + { NULL, "muld", S_LR2, 0, 0x8F }, + + { NULL, "subf", S_LR2, 0, 0xC0 }, + { NULL, "cmpf", S_LR2, 0, 0xC1 }, + { NULL, "ldf", S_LR2, 0, 0xC6 }, + { NULL, "stf", S_STR2, 0, 0xC7 }, + { NULL, "addf", S_LR2, 0, 0xCB }, + + { NULL, "bsr", S_BRA, S_EOL, 0x8D }, + +}; + +struct opdata mc6800[] = { + + {{ (char) 0x34, (char) 0x04, /* pshs b ;aba */ + (char) 0xab, (char) 0xe0 /* adda ,s+ */ }}, + + {{ (char) 0x34, (char) 0x04, /* pshs b ;cba */ + (char) 0xa1, (char) 0xe0 /* cmpa ,s+ */ }}, + + {{ (char) 0x1c, (char) 0xfe, /* andcc #0xFE ;clc */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x1c, (char) 0xef, /* andcc #0xEF ;cli */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x1c, (char) 0xfd, /* andcc #0xFD ;clv */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x32, (char) 0x7f, /* leas -1,s ;des */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x30, (char) 0x1f, /* leax -1,x ;dex */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x32, (char) 0x61, /* leas 1,s ;ins */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x30, (char) 0x01, /* leax 1,x ;inx */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x34, (char) 0x02, /* pshs a ;psha */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x34, (char) 0x04, /* pshs b ;pshb */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x35, (char) 0x02, /* puls a ;pula */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x35, (char) 0x04, /* puls b ;pulb */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x34, (char) 0x04, /* pshs b ;sba */ + (char) 0xa0, (char) 0xe0 /* suba ,s+ */ }}, + + {{ (char) 0x1a, (char) 0x01, /* orcc #0x01 ;sec */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x1a, (char) 0x10, /* orcc #0x10 ;sei */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x1a, (char) 0x02, /* orcc #0x02 ;sev */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x1f, (char) 0x89, /* tfr a,b ;tab */ + (char) 0x4d, (char) 0x00 /* tsta */ }}, + + {{ (char) 0x1f, (char) 0x8a, /* tfr a,cc ;tap */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x1f, (char) 0x98, /* tfr b,a ;tba */ + (char) 0x5d, (char) 0x00 /* tstb */ }}, + + {{ (char) 0x1f, (char) 0xa8, /* tfr cc,a ;tpa */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x1f, (char) 0x41, /* tfr s,x ;tsx */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x1f, (char) 0x14, /* tfr x,s ;txs */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x3c, (char) 0xff, /* cwai #0xFF ;wai */ + (char) 0x00, (char) 0x00 }} +}; diff --git a/as-4.1.0/as6309/m6309.h b/as-4.1.0/as6309/m6309.h new file mode 100644 index 0000000..863f23f --- /dev/null +++ b/as-4.1.0/as6309/m6309.h @@ -0,0 +1,168 @@ +/* m6809.h */ + +/* + * (C) Copyright 1989-2006 + * All Rights Reserved + * + * Alan R. Baldwin + * 721 Berkeley St. + * Kent, Ohio 44240 + */ + +/*)BUILD + $(PROGRAM) = AS6809 + $(INCLUDE) = { + ASXXXX.H + M6809.H + } + $(FILES) = { + M09EXT.C + M09MCH.C + M09ADR.C + M09PST.C + ASMAIN.C + ASDBG.C + ASLEX.C + ASSYM.C + ASSUBR.C + ASEXPR.C + ASDATA.C + ASLIST.C + ASOUT.C + } + $(STACK) = 3000 +*/ + +/* + * Addressing types + */ +#define S_EXT 30 +#define S_IMMED 31 +#define S_IMB 32 +#define S_IMW 33 +#define S_IMER 34 +#define S_DIR 35 +#define S_IND 36 +#define S_OFST 37 +#define S_PC 38 +#define S_PCR 39 + +/* + * 6809 Instruction types + */ +#define S_BRA 40 +#define S_LBRA 41 +#define S_LBSR 42 +#define S_SOP 43 +#define S_ACC 44 +#define S_STR1 45 +#define S_STR 46 +#define S_LR2 47 +#define S_LR1 48 +#define S_LR 49 +#define S_LEA 50 +#define S_PULS 51 +#define S_PULU 52 +#define S_EXG 53 +#define S_CC 54 +#define S_INH2 55 +#define S_INH1 56 +#define S_INH 57 +#define S_LRQ 58 +#define S_IR 59 +#define S_IMM1 60 +#define S_IMM2 61 +#define S_STR2 62 + +/* + * Other Information + */ +#define S_FLAG 69 + +/* + * 6800 Instruction types + */ +#define S_6800 70 + +/* + * Set Direct Pointer + */ +#define S_SDP 80 + + +extern int aindx; + +struct sdp +{ + a_uint s_addr; + struct area * s_area; +}; + +struct adsym +{ + char a_str[4]; /* addressing string */ + int a_val; /* addressing mode value */ +}; + +extern struct adsym abd[]; +extern struct adsym xyus[]; +extern struct adsym auto1[]; +extern struct adsym auto2[]; +extern struct adsym pc[]; +extern struct adsym pcr[]; +extern struct adsym regs[]; +extern struct adsym stks[]; +extern struct adsym stku[]; + +struct opdata +{ + char opcode[4]; /* byte data */ +}; + +extern struct opdata mc6800[]; + + + /* machine dependent functions */ + +#ifdef OTHERSYSTEM + + /* m09adr.c */ +extern int addr(struct expr *esp); +extern int addr1(struct expr *esp); +extern int admode(struct adsym *sp); +extern int any(int c, char *str); +extern int srch(char *str); + + /* m09mch.c */ +extern VOID machine(struct mne *mp); +extern VOID genout(int cpg, int op, int rf, struct expr *esp); +extern VOID m68out(int i); +extern int mchpcr(struct expr *esp); +extern VOID minit(void); +extern int setbit(int b); +extern int getbit(void); +extern int comma(void); +extern struct sdp sdp; + +#else + + /* m09adr.c */ +extern int addr(); +extern int addr1(); +extern int admode(); +extern int any(); +extern int srch(); + + /* m09mch.c */ +extern VOID machine(); +extern VOID genout(); +extern VOID m68out(); +extern int mchpcr(); +extern VOID minit(); +extern int setbit(); +extern int getbit(); +extern int comma(); +extern struct sdp sdp; + +#endif + diff --git a/as-4.1.0/as6809/m09adr.c b/as-4.1.0/as6809/m09adr.c new file mode 100644 index 0000000..6387576 --- /dev/null +++ b/as-4.1.0/as6809/m09adr.c @@ -0,0 +1,268 @@ +/* M09ADR:C */ + +/* + * (C) Copyright 1989-2006 + * All Rights Reserved + * + * Alan R. Baldwin + * 721 Berkeley St. + * Kent, Ohio 44240 + */ + +#include "asxxxx.h" +#include "m6809.h" + +int aindx; + +int +addr(esp) +struct expr *esp; +{ + int c; + + aindx = 0; + if ((c = getnb()) == '#') { + expr(esp, 0); + esp->e_mode = S_IMMED; + } else + if (c == '[') { + aindx = 0x90; + addr1(esp); + if (getnb() != ']') { + aerr(); + } + } else { + unget(c); + addr1(esp); + } + return (esp->e_mode); +} + +int +addr1(esp) +struct expr *esp; +{ + int c; + + if (admode(abd)) { + comma(); + if (!admode(xyus)) + aerr(); + esp->e_mode = S_IND; + } else + if ((c = getnb()) == ',') { + if (admode(xyus)) { + aindx |= 0x04; + } else + if (admode(auto2)) { + ; + } else + if (!(aindx & 0x10) && admode(auto1)) { + ; + } else { + aerr(); + } + esp->e_mode = S_IND; + } else + if (c == '*') { + expr(esp, 0); + esp->e_mode = S_DIR; + if ((c = getnb()) == ',') { + if (admode(xyus)) { + esp->e_mode = S_OFST; + } else + if (admode(pcr)) { + esp->e_mode = S_PCR; + } else + if (admode(pc)) { + esp->e_mode = S_PC; + } else { + aerr(); + } + } else { + unget(c); + } + } else { + unget(c); + expr(esp, 0); + if ((c = getnb()) == ',') { + if (admode(xyus)) { + esp->e_mode = S_OFST; + } else + if (admode(pcr)) { + esp->e_mode = S_PCR; + } else + if (admode(pc)) { + esp->e_mode = S_PC; + } else { + aerr(); + } + } else { + unget(c); + esp->e_mode = S_EXT; + } + } + return (esp->e_mode); +} + + +/* + * Enter admode() to search a specific addressing mode table + * for a match. Return the addressing value on a match or + * zero for no match. + */ +int +admode(sp) +struct adsym *sp; +{ + char *ptr; + int i, v; + char *ips; + + ips = ip; + unget(getnb()); + + i = 0; + while ( *(ptr = &sp[i].a_str[0]) ) { + if (srch(ptr)) { + v = sp[i].a_val; + aindx |= (v | 0x80); + return(v); + } + i++; + } + ip = ips; + return(0); +} + +/* + * srch --- does string match ? + */ +int +srch(str) +char *str; +{ + char *ptr; + ptr = ip; + + while (*ptr && *str) { + if (ccase[*ptr & 0x007F] != ccase[*str & 0x007F]) + break; + ptr++; + str++; + } + if (ccase[*ptr & 0x007F] == ccase[*str & 0x007F]) { + ip = ptr; + return(1); + } + + if (!*str) + if (any(*ptr," \t\n,];")) { + ip = ptr; + return(1); + } + return(0); +} + +/* + * any --- does str contain c? + */ +int +any(c,str) +int c; +char *str; +{ + while (*str) + if(*str++ == c) + return(1); + return(0); +} + +struct adsym abd[] = { /* a, b, or d indexed offset */ + { "a", 0x06 }, + { "b", 0x05 }, + { "d", 0x0B }, + { "", 0x00 } +}; + +struct adsym xyus[] = { /* x, y, u, or s index register */ + { "x", 0x100 }, + { "y", 0x120 }, + { "u", 0x140 }, + { "s", 0x160 }, + { "", 0x000 } +}; + +struct adsym auto1[] = { /* auto increment/decrement by 1 */ + { "x+", 0x100 }, + { "-x", 0x102 }, + { "y+", 0x120 }, + { "-y", 0x122 }, + { "u+", 0x140 }, + { "-u", 0x142 }, + { "s+", 0x160 }, + { "-s", 0x162 }, + { "", 0x000 } +}; + +struct adsym auto2[] = { /* auto increment/decrement by 2 */ + { "x++", 0x101 }, + { "--x", 0x103 }, + { "y++", 0x121 }, + { "--y", 0x123 }, + { "u++", 0x141 }, + { "--u", 0x143 }, + { "s++", 0x161 }, + { "--s", 0x163 }, + { "", 0x000 } +}; + +struct adsym pc[] = { /* pc */ + { "pc", 0x0C }, + { "", 0x00 } +}; + +struct adsym pcr[] = { /* pc relative */ + { "pcr", 0x0C }, + { "", 0x00 } +}; + +struct adsym regs[] = { /* exg, tfr register coding */ + { "d", 0x100 }, + { "x", 0x101 }, + { "y", 0x102 }, + { "u", 0x103 }, + { "s", 0x104 }, + { "pc", 0x105 }, + { "a", 0x108 }, + { "b", 0x109 }, + { "cc", 0x10A }, + { "dp", 0x10B }, + { "", 0x000 } +}; + +struct adsym stks[] = { /* push/pull on system stack */ + { "cc", 0x01 }, + { "a", 0x02 }, + { "b", 0x04 }, + { "d", 0x06 }, + { "dp", 0x08 }, + { "x", 0x10 }, + { "y", 0x20 }, + { "u", 0x40 }, + { "pc", 0x80 }, + { "", 0x00 } +}; + +struct adsym stku[] = { /* push/pull on user stack */ + { "cc", 0x01 }, + { "a", 0x02 }, + { "b", 0x04 }, + { "d", 0x06 }, + { "dp", 0x08 }, + { "x", 0x10 }, + { "y", 0x20 }, + { "s", 0x40 }, + { "pc", 0x80 }, + { "", 0x00 } +}; diff --git a/as-4.1.0/as6809/m09ext.c b/as-4.1.0/as6809/m09ext.c new file mode 100644 index 0000000..1b1a815 --- /dev/null +++ b/as-4.1.0/as6809/m09ext.c @@ -0,0 +1,17 @@ +/* M09EXT:C */ + +/* + * (C) Copyright 1989-2006 + * All Rights Reserved + * + * Alan R. Baldwin + * 721 Berkeley St. + * Kent, Ohio 44240 + */ + +#include "asxxxx.h" +#include "m6809.h" + +char *cpu = "Motorola 6809"; +int hilo = 1; +char *dsft = "asm"; diff --git a/as-4.1.0/as6809/m09mch.c b/as-4.1.0/as6809/m09mch.c new file mode 100644 index 0000000..64c1569 --- /dev/null +++ b/as-4.1.0/as6809/m09mch.c @@ -0,0 +1,636 @@ +/* M09MCH:C */ + +/* + * (C) Copyright 1989-2006 + * All Rights Reserved + * + * Alan R. Baldwin + * 721 Berkeley St. + * Kent, Ohio 44240 + */ + +#include "asxxxx.h" +#include "m6809.h" + +#define NB 512 + +int *bp; +int bm; +int bb[NB]; + +/* + * Opcode Cycle Definitions + */ +#define OPCY_SDP ((char) (0xFF)) +#define OPCY_ERR ((char) (0xFE)) + +/* OPCY_NONE ((char) (0x80)) */ +/* OPCY_MASK ((char) (0x7F)) */ + +#define OPCY_INDX ((char) (0x40)) +#define OPCY_PSPL ((char) (0x20)) + +#define VALU_MASK ((char) (0x1F)) + +#define UN ((char) (OPCY_NONE | 0x00)) +#define P2 ((char) (OPCY_NONE | 0x01)) +#define P3 ((char) (OPCY_NONE | 0x02)) + +#define I3 ((char) (OPCY_INDX | 0x03)) +#define I4 ((char) (OPCY_INDX | 0x04)) +#define I5 ((char) (OPCY_INDX | 0x05)) +#define I6 ((char) (OPCY_INDX | 0x06)) +#define I7 ((char) (OPCY_INDX | 0x07)) + +#define PP ((char) (OPCY_PSPL | 0x05)) + +/* + * 6809 Cycle Count + * + * opcycles = m09pg1[opcode] + */ +static char m09pg1[256] = { +/*--*--* 0 1 2 3 4 5 6 7 8 9 A B C D E F */ +/*--*--* - - - - - - - - - - - - - - - - */ +/*00*/ 6,UN,UN, 6, 6,UN, 6, 6, 6, 6, 6,UN, 6, 6, 3, 6, +/*10*/ P2,P3, 2, 4,UN,UN, 5, 9,UN, 2, 3,UN, 3, 2, 8, 6, +/*20*/ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, +/*30*/ I4,I4,I4,I4,PP,PP,PP,PP,UN, 5, 3,15,20,11,UN,19, +/*40*/ 2,UN,UN, 2, 2,UN, 2, 2, 2, 2, 2,UN, 2, 2,UN, 2, +/*50*/ 2,UN,UN, 2, 2,UN, 2, 2, 2, 2, 2,UN, 2, 2,UN, 2, +/*60*/ I6,UN,UN,I6,I6,UN,I6,I6,I6,I6,I6,UN,I6,I6,I3,I6, +/*70*/ 7,UN,UN, 7, 7,UN, 7, 7, 7, 7, 7,UN, 7, 7, 4, 7, +/*80*/ 2, 2, 2, 4, 2, 2, 2,UN, 2, 2, 2, 2, 4, 7, 3,UN, +/*90*/ 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 4, 6, 7, 5, 5, +/*A0*/ I4,I4,I4,I6,I4,I4,I4,I4,I4,I4,I4,I4,I6,I7,I5,I5, +/*B0*/ 5, 5, 5, 7, 5, 5, 5, 5, 5, 5, 5, 5, 7, 8, 6, 6, +/*C0*/ 2, 2, 2, 4, 2, 2, 2,UN, 2, 2, 2, 2, 3,UN, 3,UN, +/*D0*/ 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 5, 5, +/*E0*/ I4,I4,I4,I6,I4,I4,I4,I4,I4,I4,I4,I4,I5,I5,I5,I5, +/*F0*/ 5, 5, 5, 7, 5, 5, 5, 5, 5, 5, 5, 5, 6, 6, 6, 6 +}; + +static char m09pg2[256] = { +/*--*--* 0 1 2 3 4 5 6 7 8 9 A B C D E F */ +/*--*--* - - - - - - - - - - - - - - - - */ +/*00*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*10*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*20*/ UN, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, +/*30*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,20, +/*40*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*50*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*60*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*70*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*80*/ UN,UN,UN, 5,UN,UN,UN,UN,UN,UN,UN,UN, 5,UN, 4,UN, +/*90*/ UN,UN,UN, 7,UN,UN,UN,UN,UN,UN,UN,UN, 7,UN, 6,UN, +/*A0*/ UN,UN,UN,I7,UN,UN,UN,UN,UN,UN,UN,UN,I7,UN,I6,I6, +/*B0*/ UN,UN,UN, 8,UN,UN,UN,UN,UN,UN,UN,UN, 8,UN, 7, 7, +/*C0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, 4,UN, +/*D0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, 6, 6, +/*E0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,I6,I6, +/*F0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, 7, 7 +}; + +static char m09pg3[256] = { +/*--*--* 0 1 2 3 4 5 6 7 8 9 A B C D E F */ +/*--*--* - - - - - - - - - - - - - - - - */ +/*00*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*10*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*20*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*30*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,20, +/*40*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*50*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*60*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*70*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*80*/ UN,UN,UN, 5,UN,UN,UN,UN,UN,UN,UN,UN, 5,UN,UN,UN, +/*90*/ UN,UN,UN, 7,UN,UN,UN,UN,UN,UN,UN,UN, 7,UN,UN,UN, +/*A0*/ UN,UN,UN,I7,UN,UN,UN,UN,UN,UN,UN,UN,I7,UN,UN,UN, +/*B0*/ UN,UN,UN, 8,UN,UN,UN,UN,UN,UN,UN,UN, 8,UN,UN,UN, +/*C0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*D0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*E0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, +/*F0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, 1,UN,UN,UN +}; + +static char *Page[3] = { + m09pg1, m09pg2, m09pg3 +}; + +static char m09idx[32] = { +/* ,R+ */ 2, /* ,R++ */ 3, +/* ,-R */ 2, /* ,--R */ 3, +/* ,R */ 0, /* B,R */ 1, +/* A,R */ 1, /* --- */ 0, +/* n,R (8)*/ 1, /* n,R (16)*/ 4, +/* --- */ 0, /* D,R */ 4, +/* n,PCR (8)*/ 1, /* n,PCR (16)*/ 5, +/* --- */ 0, /* --- */ 0, +/* --- */ 0, /* [,R++] */ 6, +/* --- */ 0, /* [,--R] */ 6, +/* [,R] */ 3, /* [B,R] */ 4, +/* [A,R] */ 4, /* --- */ 0, +/* [n,R] (8)*/ 4, /* [n,R] (16)*/ 7, +/* --- */ 0, /* [D,R] */ 7, +/* [n,PCR] (8)*/ 4, /* [n,PCR] (16)*/ 8, +/* --- */ 0, /* [n] */ 5 +}; + +static char m00cyc[24] = { + 12,12, 3, 3, 3, 5, 5, 5, + 5, 6, 6, 6, 6,12, 3, 3, + 3, 8, 6, 8, 6, 6, 6,20 +}; + + +/* + * Process a machine op. + */ +VOID +machine(mp) +struct mne *mp; +{ + int op, rf, cpg, c; + struct expr e1; + int t1, v1, v2; + struct area *espa; + char id[NCPS]; + + cpg = 0; + clrexpr(&e1); + op = (int) mp->m_valu; + switch (rf = mp->m_type) { + + case S_SDP: + opcycles = OPCY_SDP; + espa = NULL; + if (more()) { + expr(&e1, 0); + if (e1.e_flag == 0 && e1.e_base.e_ap == NULL) { + if (e1.e_addr & 0xFF) { + err('b'); + } + } + if ((c = getnb()) == ',') { + getid(id, -1); + espa = alookup(id); + if (espa == NULL) { + err('u'); + } + } else { + unget(c); + } + } + if (espa) { + outdp(espa, &e1, 0); + } else { + outdp(dot.s_area, &e1, 0); + } + lmode = SLIST; + break; + + case S_INH2: + cpg += 0x01; + + case S_INH1: + cpg += 0x10; + + case S_INH: + if (cpg) + outab(cpg); + outab(op); + break; + + case S_BRA: + expr(&e1, 0); + outab(op); + if (mchpcr(&e1)) { + v1 = (int) (e1.e_addr - dot.s_addr - 1); + if ((v1 < -128) || (v1 > 127)) + aerr(); + outab(v1); + } else { + outrb(&e1, R_PCR); + } + if (e1.e_mode != S_USER) + rerr(); + break; + + case S_LBRA: + cpg += 0x10; + + case S_LBSR: + expr(&e1, 0); + if (cpg) + outab(cpg); + outab(op); + if (mchpcr(&e1)) { + v1 = (int) (e1.e_addr - dot.s_addr - 2); + outaw(v1); + } else { + outrw(&e1, R_PCR); + } + if (e1.e_mode != S_USER) + aerr(); + break; + + case S_PULS: + v1 = 0; + do { + if ((t1 = admode(stks)) == 0 || v1 & t1) + aerr(); + v1 |= t1; + } while (more() && comma()); + outab(op); + outab(v1); + break; + + case S_PULU: + v1 = 0; + do { + if ((t1 = admode(stku)) == 0 || v1 & t1) + aerr(); + v1 |= t1; + } while (more() && comma()); + outab(op); + outab(v1); + break; + + case S_EXG: + v1 = admode(regs); + comma(); + v2 = admode(regs); + if ((v1 & 0x08) != (v2 & 0x08)) + aerr(); + outab(op); + outab((v1<<4)|v2); + break; + + case S_ACC: + t1 = addr(&e1); + if (t1 == S_IMMED) + e1.e_mode = S_IMB; + genout(cpg, op, rf, &e1); + break; + + case S_STR1: + cpg += 0x10; + + case S_SOP: + case S_STR: + t1 = addr(&e1); + if (t1 == S_IMMED) + e1.e_mode = S_IMER; + genout(cpg, op, rf, &e1); + break; + + case S_LR2: + cpg += 0x01; + + case S_LR1: + cpg += 0x10; + + case S_LR: + t1 = addr(&e1); + if (t1 == S_IMMED) + e1.e_mode = S_IMW; + genout(cpg, op, rf, &e1); + break; + + case S_LEA: + t1 = addr(&e1); + if (aindx) { + genout(cpg, op, rf, &e1); + break; + } + aerr(); + break; + + case S_CC: + t1 = addr(&e1); + if (t1 == S_IMMED) { + e1.e_mode = S_IMB; + genout(cpg, op, rf, &e1); + break; + } + aerr(); + break; + + case S_6800: + m68out(op); + opcycles = m00cyc[op]; + break; + + default: + opcycles = OPCY_ERR; + err('o'); + break; + } + + if (opcycles == OPCY_NONE) { + v2 = 1; + opcycles = m09pg1[cb[0] & 0xFF]; + if ((opcycles & OPCY_NONE) && (opcycles & OPCY_MASK)) { + v2 += 1; + opcycles = Page[opcycles & OPCY_MASK][cb[1] & 0xFF]; + } + if (opcycles & OPCY_INDX) { + if (cb[v2] & 0x80) { + opcycles = (opcycles & VALU_MASK) + m09idx[cb[v2] & 0x1F]; + } else { + opcycles = (opcycles & VALU_MASK) + 1; + } + } else + if (opcycles & OPCY_PSPL) { + for (t1=0x01,v1=0; t1 < 0x0100; t1 <<= 1) { + if (cb[1] & t1) { + v1 += 1; + } + } + opcycles = (opcycles & VALU_MASK) + v1; + } + } +} + +/* + * General Output Routine + */ +VOID +genout(cpg, op, rf, esp) +int cpg, op, rf; +struct expr *esp; +{ + int espv; + struct area *espa; + int disp, flag; + + espv = (int) esp->e_addr; + espa = esp->e_base.e_ap; + switch (esp->e_mode) { + + case S_IMB: + if (cpg) + outab(cpg); + outab(op); + outrb(esp, R_NORM); + break; + + case S_IMW: + if (cpg) + outab(cpg); + outab(op); + outrw(esp, R_NORM); + break; + + case S_DIR: + if (cpg) + outab(cpg); + if (rf == S_SOP) { + outab(op&0x0F); + } else { + outab(op|0x10); + } + outrb(esp, R_PAGN); + break; + + case S_EXT: + if (cpg) + outab(cpg); + if (aindx) { + outab(op|0x20); + outab(aindx|0x0F); + outrw(esp, R_NORM); + break; + } + outab(op|0x30); + outrw(esp, R_NORM); + break; + + case S_IND: + if (cpg) + outab(cpg); + outab(op|0x20); + outab(aindx); + break; + + case S_PC: + if (espa) { + aerr(); + break; + } + if (cpg) + outab(cpg); + outab(op|0x20); + if (pass == 0) { + dot.s_addr += 3; + } else + if (pass == 1) { + if (esp->e_addr >= dot.s_addr) + esp->e_addr -= fuzz; + dot.s_addr += 2; + disp = (int) esp->e_addr; + flag = 0; + if (disp < -128 || disp > 127) + ++flag; + if (setbit(flag)) + ++dot.s_addr; + } else { + if (getbit()) { + outab(aindx|0x01); + outaw(espv); + } else { + outab(aindx); + outab(espv); + } + } + break; + + case S_PCR: + if (cpg) + outab(cpg); + outab(op|0x20); + if (pass == 0) { + dot.s_addr += 3; + } else + if (espa && espa != dot.s_area) { + outab(aindx|0x01); + outrw(esp, R_PCR); + } else + if (pass == 1) { + if (esp->e_addr >= dot.s_addr) + esp->e_addr -= fuzz; + dot.s_addr += 2; + disp = (int) (esp->e_addr - dot.s_addr); + flag = 0; + if (disp < -128 || disp > 127) + ++flag; + if (setbit(flag)) + ++dot.s_addr; + } else { + if (getbit()) { + outab(aindx|0x01); + disp = (int) (espv - dot.s_addr - 2); + outaw(disp); + } else { + outab(aindx); + disp = (int) (espv - dot.s_addr - 1); + outab(disp); + } + } + break; + + case S_OFST: + if (cpg) + outab(cpg); + outab(op|0x20); + if (pass == 0) { + dot.s_addr += 3; + } else + if (espa) { + outab(aindx|0x09); + outrw(esp, R_NORM); + } else + if (pass == 1) { + if (esp->e_addr >= dot.s_addr) + esp->e_addr -= fuzz; + dot.s_addr += 1; + flag = 0; + if (espv < -128 || espv > 127) + ++flag; + if (setbit(flag)) { + dot.s_addr += 2; + } else { + flag = aindx & 0x10; + if (espv < -16 || espv > 15) + ++flag; + if (setbit(flag)) + ++dot.s_addr; + } + } else { + if (getbit()) { + outab(aindx|0x09); + outaw(espv); + } else { + if (getbit()) { + outab(aindx|0x08); + outab(espv); + } else { + outab((aindx & 0x60) | (espv & 0x1F)); + } + } + } + break; + + case S_IMER: + default: + aerr(); + } +} + +/* + * mc6800 compatibility output routine + */ +VOID +m68out(i) +int i; +{ + char *ptr; + int j; + + ptr = (char *) &mc6800[i]; + for (j=0; j<4 ; j++) { + if ((i = *ptr++) != 0) { + outab(i); + } else { + break; + } + } +} + +/* + * Branch/Jump PCR Mode Check + */ +int +mchpcr(esp) +struct expr *esp; +{ + if (esp->e_base.e_ap == dot.s_area) { + return(1); + } + if (esp->e_flag==0 && esp->e_base.e_ap==NULL) { + /* + * Absolute Destination + * + * Use the global symbol '.__.ABS.' + * of value zero and force the assembler + * to use this absolute constant as the + * base value for the relocation. + */ + esp->e_flag = 1; + esp->e_base.e_sp = &sym[1]; + } + return(0); +} + +/* + * Machine specific initialization. + * Set up the bit table. + */ +VOID +minit() +{ + bp = bb; + bm = 1; +} + +/* + * Store `b' in the next slot of the bit table. + * If no room, force the longer form of the offset. + */ +int +setbit(b) +int b; +{ + if (bp >= &bb[NB]) + return(1); + if (b) + *bp |= bm; + bm <<= 1; + if (bm == 0) { + bm = 1; + ++bp; + } + return(b); +} + +/* + * Get the next bit from the bit table. + * If none left, return a `1'. + * This will force the longer form of the offset. + */ +int +getbit() +{ + register int f; + + if (bp >= &bb[NB]) + return (1); + f = *bp & bm; + bm <<= 1; + if (bm == 0) { + bm = 1; + ++bp; + } + return (f); +} + +/* + * The next character must be a + * comma. + */ +int +comma() +{ + if (getnb() != ',') + qerr(); + return(1); +} diff --git a/as-4.1.0/as6809/m09pst.c b/as-4.1.0/as6809/m09pst.c new file mode 100644 index 0000000..2d73faf --- /dev/null +++ b/as-4.1.0/as6809/m09pst.c @@ -0,0 +1,444 @@ +/* M09PST:C */ + +/* + * (C) Copyright 1989-2006 + * All Rights Reserved + * + * Alan R. Baldwin + * 721 Berkeley St. + * Kent, Ohio 44240 + */ + +#include "asxxxx.h" +#include "m6809.h" + +/* + * Coding Banks + */ +struct bank bank[2] = { + /* The '_CODE' area/bank has a NULL default file suffix. */ + { NULL, "_CSEG", NULL, 0, 0, 0, 0, 0 }, + { &bank[0], "_DSEG", "_DS", 1, 0, 0, 0, B_FSFX } +}; + +/* + * Coding Areas + */ +struct area area[2] = { + { NULL, &bank[0], "_CODE", 0, 0, 0, A_1BYTE|A_BNK|A_CSEG }, + { &area[0], &bank[1], "_DATA", 1, 0, 0, A_1BYTE|A_BNK|A_DSEG } +}; + +/* + * Basic Relocation Mode Definition + * + * #define R_NORM 0000 No Bit Positioning + */ +char mode0[32] = { /* R_NORM */ + '\200', '\201', '\202', '\203', '\204', '\205', '\206', '\207', + '\210', '\211', '\212', '\213', '\214', '\215', '\216', '\217', + '\220', '\221', '\222', '\223', '\224', '\225', '\226', '\227', + '\230', '\231', '\232', '\233', '\234', '\235', '\236', '\237' +}; + +/* + * Additional Relocation Mode Definitions + */ + +/* None Required */ + +/* + * *m_def is a pointer to the bit relocation definition. + * m_flag indicates that bit position swapping is required. + * m_mask contains the active bit positions for the output. + * m_mbro contains the active bit positions for the input. + * + * struct mode + * { + * char * m_def; Bit Relocation Definition + * int m_flag; Bit Swapping Flag + * int m_mask; Bit Mask + * int m_mbro; Bit Range Overflow Mask + * }; + */ +struct mode mode[1] = { + { &mode0[0], 0, 0x0000FFFF, 0x0000FFFF } +}; + +/* + * Array of Pointers to mode Structures + */ +struct mode *modep[16] = { + &mode[0], NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL +}; + +/* + * Mnemonic Structure + */ +struct mne mne[] = { + + /* machine */ + + { NULL, "CSEG", S_ATYP, 0, A_CSEG|A_1BYTE }, + { NULL, "DSEG", S_ATYP, 0, A_DSEG|A_1BYTE }, + + { NULL, ".setdp", S_SDP, 0, 0 }, + + /* system */ + + { NULL, "BANK", S_ATYP, 0, A_BNK }, + { NULL, "CON", S_ATYP, 0, A_CON }, + { NULL, "OVR", S_ATYP, 0, A_OVR }, + { NULL, "REL", S_ATYP, 0, A_REL }, + { NULL, "ABS", S_ATYP, 0, A_ABS }, + { NULL, "NOPAG", S_ATYP, 0, A_NOPAG }, + { NULL, "PAG", S_ATYP, 0, A_PAG }, + + { NULL, "BASE", S_BTYP, 0, B_BASE }, + { NULL, "SIZE", S_BTYP, 0, B_SIZE }, + { NULL, "FSFX", S_BTYP, 0, B_FSFX }, + { NULL, "MAP", S_BTYP, 0, B_MAP }, + + { NULL, ".page", S_PAGE, 0, 0 }, + { NULL, ".title", S_HEADER, 0, O_TITLE }, + { NULL, ".sbttl", S_HEADER, 0, O_SBTTL }, + { NULL, ".module", S_MODUL, 0, 0 }, + { NULL, ".include", S_INCL, 0, 0 }, + { NULL, ".area", S_AREA, 0, 0 }, + { NULL, ".bank", S_BANK, 0, 0 }, + { NULL, ".org", S_ORG, 0, 0 }, + { NULL, ".radix", S_RADIX, 0, 0 }, + { NULL, ".globl", S_GLOBL, 0, 0 }, + { NULL, ".local", S_LOCAL, 0, 0 }, + { NULL, ".if", S_CONDITIONAL, 0, O_IF }, + { NULL, ".else", S_CONDITIONAL, 0, O_ELSE }, + { NULL, ".endif", S_CONDITIONAL, 0, O_ENDIF }, + { NULL, ".ifdef", S_CONDITIONAL, 0, O_IFDEF }, + { NULL, ".ifndef", S_CONDITIONAL, 0, O_IFNDEF}, + { NULL, ".ifgt", S_CONDITIONAL, 0, O_IFGT }, + { NULL, ".iflt", S_CONDITIONAL, 0, O_IFLT }, + { NULL, ".ifge", S_CONDITIONAL, 0, O_IFGE }, + { NULL, ".ifle", S_CONDITIONAL, 0, O_IFLE }, + { NULL, ".ifeq", S_CONDITIONAL, 0, O_IFEQ }, + { NULL, ".ifne", S_CONDITIONAL, 0, O_IFNE }, + { NULL, ".list", S_LISTING, 0, O_LIST }, + { NULL, ".nlist", S_LISTING, 0, O_NLIST }, + { NULL, ".equ", S_EQU, 0, O_EQU }, + { NULL, ".gblequ", S_EQU, 0, O_GBLEQU}, + { NULL, ".lclequ", S_EQU, 0, O_LCLEQU}, + { NULL, ".byte", S_DATA, 0, O_1BYTE }, + { NULL, ".db", S_DATA, 0, O_1BYTE }, + { NULL, ".fcb", S_DATA, 0, O_1BYTE }, + { NULL, ".word", S_DATA, 0, O_2BYTE }, + { NULL, ".dw", S_DATA, 0, O_2BYTE }, + { NULL, ".fdb", S_DATA, 0, O_2BYTE }, +/* { NULL, ".3byte", S_DATA, 0, O_3BYTE }, */ +/* { NULL, ".triple", S_DATA, 0, O_3BYTE }, */ +/* { NULL, ".4byte", S_DATA, 0, O_4BYTE }, */ +/* { NULL, ".quad", S_DATA, 0, O_4BYTE }, */ + { NULL, ".blkb", S_BLK, 0, O_1BYTE }, + { NULL, ".ds", S_BLK, 0, O_1BYTE }, + { NULL, ".rmb", S_BLK, 0, O_1BYTE }, + { NULL, ".rs", S_BLK, 0, O_1BYTE }, + { NULL, ".blkw", S_BLK, 0, O_2BYTE }, +/* { NULL, ".blk3", S_BLK, 0, O_3BYTE }, */ +/* { NULL, ".blk4", S_BLK, 0, O_4BYTE }, */ + { NULL, ".ascii", S_ASCIX, 0, O_ASCII }, + { NULL, ".ascis", S_ASCIX, 0, O_ASCIS }, + { NULL, ".asciz", S_ASCIX, 0, O_ASCIZ }, + { NULL, ".str", S_ASCIX, 0, O_ASCII }, + { NULL, ".strs", S_ASCIX, 0, O_ASCIS }, + { NULL, ".strz", S_ASCIX, 0, O_ASCIZ }, + { NULL, ".fcc", S_ASCIX, 0, O_ASCII }, + { NULL, ".define", S_DEFINE, 0, O_DEF }, + { NULL, ".undefine", S_DEFINE, 0, O_UNDEF }, + { NULL, ".even", S_BOUNDARY, 0, O_EVEN }, + { NULL, ".odd", S_BOUNDARY, 0, O_ODD }, + { NULL, ".msg" , S_MSG, 0, 0 }, + { NULL, ".assume", S_ERROR, 0, O_ASSUME}, + { NULL, ".error", S_ERROR, 0, O_ERROR }, +/* { NULL, ".msb", S_MSB, 0, 0 }, */ +/* { NULL, ".8bit", S_BITS, 0, O_1BYTE }, */ +/* { NULL, ".16bit", S_BITS, 0, O_2BYTE }, */ +/* { NULL, ".24bit", S_BITS, 0, O_3BYTE }, */ +/* { NULL, ".32bit", S_BITS, 0, O_4BYTE }, */ + { NULL, ".end", S_END, 0, 0 }, + + /* 6800 Compatibility */ + + { NULL, "ldaa", S_ACC, 0, 0x86 }, + { NULL, "ldab", S_ACC, 0, 0xC6 }, + { NULL, "oraa", S_ACC, 0, 0x8A }, + { NULL, "orab", S_ACC, 0, 0xCA }, + { NULL, "staa", S_STR, 0, 0x87 }, + { NULL, "stab", S_STR, 0, 0xC7 }, + + /* if this is changed, change struct opdata mc6800[] */ + + { NULL, "aba", S_6800, 0, 0 }, + { NULL, "cba", S_6800, 0, 1 }, + { NULL, "clc", S_6800, 0, 2 }, + { NULL, "cli", S_6800, 0, 3 }, + { NULL, "clv", S_6800, 0, 4 }, + { NULL, "des", S_6800, 0, 5 }, + { NULL, "dex", S_6800, 0, 6 }, + { NULL, "ins", S_6800, 0, 7 }, + { NULL, "inx", S_6800, 0, 8 }, + { NULL, "psha", S_6800, 0, 9 }, + { NULL, "pshb", S_6800, 0, 10 }, + { NULL, "pula", S_6800, 0, 11 }, + { NULL, "pulb", S_6800, 0, 12 }, + { NULL, "sba", S_6800, 0, 13 }, + { NULL, "sec", S_6800, 0, 14 }, + { NULL, "sei", S_6800, 0, 15 }, + { NULL, "sev", S_6800, 0, 16 }, + { NULL, "tab", S_6800, 0, 17 }, + { NULL, "tap", S_6800, 0, 18 }, + { NULL, "tba", S_6800, 0, 19 }, + { NULL, "tpa", S_6800, 0, 20 }, + { NULL, "tsx", S_6800, 0, 21 }, + { NULL, "txs", S_6800, 0, 22 }, + { NULL, "wai", S_6800, 0, 23 }, + + /* 6809 */ + + { NULL, "sty", S_STR1, 0, 0x8F }, + { NULL, "sts", S_STR1, 0, 0xCF }, + + { NULL, "sta", S_STR, 0, 0x87 }, + { NULL, "stb", S_STR, 0, 0xC7 }, + { NULL, "std", S_STR, 0, 0xCD }, + { NULL, "stx", S_STR, 0, 0x8F }, + { NULL, "stu", S_STR, 0, 0xCF }, + { NULL, "jsr", S_STR, 0, 0x8D }, + + { NULL, "cmpu", S_LR2, 0, 0x83 }, + { NULL, "cmps", S_LR2, 0, 0x8C }, + + { NULL, "cmpd", S_LR1, 0, 0x83 }, + { NULL, "cmpy", S_LR1, 0, 0x8C }, + { NULL, "ldy", S_LR1, 0, 0x8E }, + { NULL, "lds", S_LR1, 0, 0xCE }, + + { NULL, "subd", S_LR, 0, 0x83 }, + { NULL, "addd", S_LR, 0, 0xC3 }, + { NULL, "cmpx", S_LR, 0, 0x8C }, + { NULL, "cpx", S_LR, 0, 0x8C }, + { NULL, "ldd", S_LR, 0, 0xCC }, + { NULL, "ldx", S_LR, 0, 0x8E }, + { NULL, "ldu", S_LR, 0, 0xCE }, + + { NULL, "leax", S_LEA, 0, 0x30 }, + { NULL, "leay", S_LEA, 0, 0x31 }, + { NULL, "leas", S_LEA, 0, 0x32 }, + { NULL, "leau", S_LEA, 0, 0x33 }, + + { NULL, "pshs", S_PULS, 0, 0x34 }, + { NULL, "puls", S_PULS, 0, 0x35 }, + { NULL, "pshu", S_PULU, 0, 0x36 }, + { NULL, "pulu", S_PULU, 0, 0x37 }, + + { NULL, "exg", S_EXG, 0, 0x1E }, + { NULL, "tfr", S_EXG, 0, 0x1F }, + + { NULL, "cwai", S_CC, 0, 0x3C }, + { NULL, "orcc", S_CC, 0, 0x1A }, + { NULL, "andcc", S_CC, 0, 0x1C }, + + { NULL, "swi3", S_INH2, 0, 0x3F }, + { NULL, "swi2", S_INH1, 0, 0x3F }, + { NULL, "swi1", S_INH, 0, 0x3F }, + + { NULL, "abx", S_INH, 0, 0x3A }, + { NULL, "asla", S_INH, 0, 0x48 }, + { NULL, "aslb", S_INH, 0, 0x58 }, + { NULL, "asra", S_INH, 0, 0x47 }, + { NULL, "asrb", S_INH, 0, 0x57 }, + { NULL, "clra", S_INH, 0, 0x4F }, + { NULL, "clrb", S_INH, 0, 0x5F }, + { NULL, "coma", S_INH, 0, 0x43 }, + { NULL, "comb", S_INH, 0, 0x53 }, + { NULL, "daa", S_INH, 0, 0x19 }, + { NULL, "deca", S_INH, 0, 0x4A }, + { NULL, "decb", S_INH, 0, 0x5A }, + { NULL, "inca", S_INH, 0, 0x4C }, + { NULL, "incb", S_INH, 0, 0x5C }, + { NULL, "lsla", S_INH, 0, 0x48 }, + { NULL, "lslb", S_INH, 0, 0x58 }, + { NULL, "lsra", S_INH, 0, 0x44 }, + { NULL, "lsrb", S_INH, 0, 0x54 }, + { NULL, "mul", S_INH, 0, 0x3D }, + { NULL, "nega", S_INH, 0, 0x40 }, + { NULL, "negb", S_INH, 0, 0x50 }, + { NULL, "nop", S_INH, 0, 0x12 }, + { NULL, "rola", S_INH, 0, 0x49 }, + { NULL, "rolb", S_INH, 0, 0x59 }, + { NULL, "rora", S_INH, 0, 0x46 }, + { NULL, "rorb", S_INH, 0, 0x56 }, + { NULL, "rti", S_INH, 0, 0x3B }, + { NULL, "rts", S_INH, 0, 0x39 }, + { NULL, "sex", S_INH, 0, 0x1D }, + { NULL, "swi", S_INH, 0, 0x3F }, + { NULL, "sync", S_INH, 0, 0x13 }, + { NULL, "tsta", S_INH, 0, 0x4D }, + { NULL, "tstb", S_INH, 0, 0x5D }, + + { NULL, "lbrn", S_LBRA, 0, 0x21 }, + { NULL, "lbhi", S_LBRA, 0, 0x22 }, + { NULL, "lbls", S_LBRA, 0, 0x23 }, + { NULL, "lblos", S_LBRA, 0, 0x23 }, + { NULL, "lbcc", S_LBRA, 0, 0x24 }, + { NULL, "lbhs", S_LBRA, 0, 0x24 }, + { NULL, "lbhis", S_LBRA, 0, 0x24 }, + { NULL, "lbcs", S_LBRA, 0, 0x25 }, + { NULL, "lblo", S_LBRA, 0, 0x25 }, + { NULL, "lbne", S_LBRA, 0, 0x26 }, + { NULL, "lbeq", S_LBRA, 0, 0x27 }, + { NULL, "lbvc", S_LBRA, 0, 0x28 }, + { NULL, "lbvs", S_LBRA, 0, 0x29 }, + { NULL, "lbpl", S_LBRA, 0, 0x2A }, + { NULL, "lbmi", S_LBRA, 0, 0x2B }, + { NULL, "lbge", S_LBRA, 0, 0x2C }, + { NULL, "lblt", S_LBRA, 0, 0x2D }, + { NULL, "lbgt", S_LBRA, 0, 0x2E }, + { NULL, "lble", S_LBRA, 0, 0x2F }, + + { NULL, "lbra", S_LBSR, 0, 0x16 }, + { NULL, "lbsr", S_LBSR, 0, 0x17 }, + + { NULL, "neg", S_SOP, 0, 0x40 }, + { NULL, "com", S_SOP, 0, 0x43 }, + { NULL, "lsr", S_SOP, 0, 0x44 }, + { NULL, "ror", S_SOP, 0, 0x46 }, + { NULL, "asr", S_SOP, 0, 0x47 }, + { NULL, "asl", S_SOP, 0, 0x48 }, + { NULL, "lsl", S_SOP, 0, 0x48 }, + { NULL, "rol", S_SOP, 0, 0x49 }, + { NULL, "dec", S_SOP, 0, 0x4A }, + { NULL, "inc", S_SOP, 0, 0x4C }, + { NULL, "tst", S_SOP, 0, 0x4D }, + { NULL, "clr", S_SOP, 0, 0x4F }, + { NULL, "jmp", S_SOP, 0, 0x4E }, + + { NULL, "suba", S_ACC, 0, 0x80 }, + { NULL, "subb", S_ACC, 0, 0xC0 }, + { NULL, "cmpa", S_ACC, 0, 0x81 }, + { NULL, "cmpb", S_ACC, 0, 0xC1 }, + { NULL, "sbca", S_ACC, 0, 0x82 }, + { NULL, "sbcb", S_ACC, 0, 0xC2 }, + { NULL, "anda", S_ACC, 0, 0x84 }, + { NULL, "andb", S_ACC, 0, 0xC4 }, + { NULL, "bita", S_ACC, 0, 0x85 }, + { NULL, "bitb", S_ACC, 0, 0xC5 }, + { NULL, "lda", S_ACC, 0, 0x86 }, + { NULL, "ldb", S_ACC, 0, 0xC6 }, + { NULL, "eora", S_ACC, 0, 0x88 }, + { NULL, "eorb", S_ACC, 0, 0xC8 }, + { NULL, "adca", S_ACC, 0, 0x89 }, + { NULL, "adcb", S_ACC, 0, 0xC9 }, + { NULL, "ora", S_ACC, 0, 0x8A }, + { NULL, "orb", S_ACC, 0, 0xCA }, + { NULL, "adda", S_ACC, 0, 0x8B }, + { NULL, "addb", S_ACC, 0, 0xCB }, + + { NULL, "bra", S_BRA, 0, 0x20 }, + { NULL, "brn", S_BRA, 0, 0x21 }, + { NULL, "bhi", S_BRA, 0, 0x22 }, + { NULL, "bls", S_BRA, 0, 0x23 }, + { NULL, "blos", S_BRA, 0, 0x23 }, + { NULL, "bcc", S_BRA, 0, 0x24 }, + { NULL, "bhs", S_BRA, 0, 0x24 }, + { NULL, "bhis", S_BRA, 0, 0x24 }, + { NULL, "bcs", S_BRA, 0, 0x25 }, + { NULL, "blo", S_BRA, 0, 0x25 }, + { NULL, "bne", S_BRA, 0, 0x26 }, + { NULL, "beq", S_BRA, 0, 0x27 }, + { NULL, "bvc", S_BRA, 0, 0x28 }, + { NULL, "bvs", S_BRA, 0, 0x29 }, + { NULL, "bpl", S_BRA, 0, 0x2A }, + { NULL, "bmi", S_BRA, 0, 0x2B }, + { NULL, "bge", S_BRA, 0, 0x2C }, + { NULL, "blt", S_BRA, 0, 0x2D }, + { NULL, "bgt", S_BRA, 0, 0x2E }, + { NULL, "ble", S_BRA, 0, 0x2F }, + { NULL, "bsr", S_BRA, 0, 0x8D }, + { NULL, "emubrk", S_INH2, S_EOL, 0xFC } +}; + +struct opdata mc6800[] = { + + {{ (char) 0x34, (char) 0x04, /* pshs b ;aba */ + (char) 0xab, (char) 0xe0 /* adda ,s+ */ }}, + + {{ (char) 0x34, (char) 0x04, /* pshs b ;cba */ + (char) 0xa1, (char) 0xe0 /* cmpa ,s+ */ }}, + + {{ (char) 0x1c, (char) 0xfe, /* andcc #0xFE ;clc */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x1c, (char) 0xef, /* andcc #0xEF ;cli */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x1c, (char) 0xfd, /* andcc #0xFD ;clv */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x32, (char) 0x7f, /* leas -1,s ;des */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x30, (char) 0x1f, /* leax -1,x ;dex */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x32, (char) 0x61, /* leas 1,s ;ins */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x30, (char) 0x01, /* leax 1,x ;inx */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x34, (char) 0x02, /* pshs a ;psha */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x34, (char) 0x04, /* pshs b ;pshb */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x35, (char) 0x02, /* puls a ;pula */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x35, (char) 0x04, /* puls b ;pulb */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x34, (char) 0x04, /* pshs b ;sba */ + (char) 0xa0, (char) 0xe0 /* suba ,s+ */ }}, + + {{ (char) 0x1a, (char) 0x01, /* orcc #0x01 ;sec */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x1a, (char) 0x10, /* orcc #0x10 ;sei */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x1a, (char) 0x02, /* orcc #0x02 ;sev */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x1f, (char) 0x89, /* tfr a,b ;tab */ + (char) 0x4d, (char) 0x00 /* tsta */ }}, + + {{ (char) 0x1f, (char) 0x8a, /* tfr a,cc ;tap */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x1f, (char) 0x98, /* tfr b,a ;tba */ + (char) 0x5d, (char) 0x00 /* tstb */ }}, + + {{ (char) 0x1f, (char) 0xa8, /* tfr cc,a ;tpa */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x1f, (char) 0x41, /* tfr s,x ;tsx */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x1f, (char) 0x14, /* tfr x,s ;txs */ + (char) 0x00, (char) 0x00 }}, + + {{ (char) 0x3c, (char) 0xff, /* cwai #0xFF ;wai */ + (char) 0x00, (char) 0x00 }} +}; diff --git a/as-4.1.0/as6809/m6809.h b/as-4.1.0/as6809/m6809.h new file mode 100644 index 0000000..07fd7cf --- /dev/null +++ b/as-4.1.0/as6809/m6809.h @@ -0,0 +1,163 @@ +/* m6809.h */ + +/* + * (C) Copyright 1989-2006 + * All Rights Reserved + * + * Alan R. Baldwin + * 721 Berkeley St. + * Kent, Ohio 44240 + */ + +/*)BUILD + $(PROGRAM) = AS6809 + $(INCLUDE) = { + ASXXXX.H + M6809.H + } + $(FILES) = { + M09EXT.C + M09MCH.C + M09ADR.C + M09PST.C + ASMAIN.C + ASDBG.C + ASLEX.C + ASSYM.C + ASSUBR.C + ASEXPR.C + ASDATA.C + ASLIST.C + ASOUT.C + } + $(STACK) = 3000 +*/ + +/* + * Addressing types + */ +#define S_EXT 30 +#define S_IMMED 31 +#define S_IMB 32 +#define S_IMW 33 +#define S_IMER 34 +#define S_DIR 35 +#define S_IND 36 +#define S_OFST 37 +#define S_PC 38 +#define S_PCR 39 + +/* + * 6809 Instruction types + */ +#define S_BRA 40 +#define S_LBRA 41 +#define S_LBSR 42 +#define S_SOP 43 +#define S_ACC 44 +#define S_STR1 45 +#define S_STR 46 +#define S_LR2 47 +#define S_LR1 48 +#define S_LR 49 +#define S_LEA 50 +#define S_PULS 51 +#define S_PULU 52 +#define S_EXG 53 +#define S_CC 54 +#define S_INH2 55 +#define S_INH1 56 +#define S_INH 57 + +/* + * Other Information + */ +#define S_FLAG 60 + +/* + * 6800 Instruction types + */ +#define S_6800 70 + +/* + * Set Direct Pointer + */ +#define S_SDP 80 + + +extern int aindx; + +struct sdp +{ + a_uint s_addr; + struct area * s_area; +}; + +struct adsym +{ + char a_str[4]; /* addressing string */ + int a_val; /* addressing mode value */ +}; + +extern struct adsym abd[]; +extern struct adsym xyus[]; +extern struct adsym auto1[]; +extern struct adsym auto2[]; +extern struct adsym pc[]; +extern struct adsym pcr[]; +extern struct adsym regs[]; +extern struct adsym stks[]; +extern struct adsym stku[]; + +struct opdata +{ + char opcode[4]; /* byte data */ +}; + +extern struct opdata mc6800[]; + + + /* machine dependent functions */ + +#ifdef OTHERSYSTEM + + /* m09adr.c */ +extern int addr(struct expr *esp); +extern int addr1(struct expr *esp); +extern int admode(struct adsym *sp); +extern int any(int c, char *str); +extern int srch(char *str); + + /* m09mch.c */ +extern VOID machine(struct mne *mp); +extern VOID genout(int cpg, int op, int rf, struct expr *esp); +extern VOID m68out(int i); +extern int mchpcr(struct expr *esp); +extern VOID minit(void); +extern int setbit(int b); +extern int getbit(void); +extern int comma(void); +extern struct sdp sdp; + +#else + + /* m09adr.c */ +extern int addr(); +extern int addr1(); +extern int admode(); +extern int any(); +extern int srch(); + + /* m09mch.c */ +extern VOID machine(); +extern VOID genout(); +extern VOID m68out(); +extern int mchpcr(); +extern VOID minit(); +extern int setbit(); +extern int getbit(); +extern int comma(); +extern struct sdp sdp; + +#endif + diff --git a/as-4.1.0/as6809/t.asm b/as-4.1.0/as6809/t.asm new file mode 100644 index 0000000..98cae52 --- /dev/null +++ b/as-4.1.0/as6809/t.asm @@ -0,0 +1,39 @@ + .sbttl Assembler Link Tests + + .module t + + ; This file and TCONST.ASM should be assembled and linked. + ; + ; AS6809 -XGOL T + ; AS6809 -XGOL TCONST + ; + ; ASLINK -C + ; -XMS + ; T + ; T + ; TCONST + ; -E + ; + ; The following tests verify the correct processing of + ; external references for the direct page, index mode offsets, + ; and branches. + ; + ; *L signifies an error will be reported at link time. + + .area A + + .blkb 1 + + .area PAGE0 (PAG) ;*L Linker -- page boundary error + + .setdp 0,PAGE0 ;*L Linker -- page definition boundary error + + .blkb 0x101 ;*L Linker -- page length error + + .area PAGE1 (ABS,OVR) + + .setdp 0x100,PAGE1 + + .setdp boundary,PAGE1 ;*L Linker -- page definition boundary error + + diff --git a/as-4.1.0/as6809/t6809.asm b/as-4.1.0/as6809/t6809.asm new file mode 100644 index 0000000..9484bb2 --- /dev/null +++ b/as-4.1.0/as6809/t6809.asm @@ -0,0 +1,1028 @@ + .title 6809 Assembler Test + + .sbttl All 6809 Instructions + + abx ;3a + adca #0x01 ;89 01 + adcb *0x02 ;d9*02 + adda #0x03 ;8b 03 + addb *0x04 ;db*04 + addd #0x05 ;c3 00 05 + anda *0x06 ;94*06 + andb #0x07 ;c4 07 + andcc #0x08 ;1c 08 + asl ,x ;68 84 + asla ;48 + aslb ;58 + asr ,x ;67 84 + asra ;47 + asrb ;57 + bcc .+0x12 ;24 10 + bcs .+0x12 ;25 10 + beq .+0x12 ;27 10 + bge .+0x12 ;2c 10 + bgt .+0x12 ;2e 10 + bhi .+0x12 ;22 10 + bhis .+0x12 ;24 10 + bhs .+0x12 ;24 10 + bita #0x09 ;85 09 + bitb *0x0a ;d5*0a + ble .+0x12 ;2f 10 + blo .+0x12 ;25 10 + blos .+0x12 ;23 10 + bls .+0x12 ;23 10 + blt .+0x12 ;2d 10 + bmi .+0x12 ;2b 10 + bne .+0x12 ;26 10 + bpl .+0x12 ;2a 10 + bra .+0x12 ;20 10 + brn .+0x12 ;21 10 + bsr .+0x12 ;8d 10 + bvc .+0x12 ;28 10 + bvs .+0x12 ;29 10 + clr ,x ;6f 84 + clra ;4f + clrb ;5f + cmpa #0x0b ;81 0b + cmpb *0x0c ;d1*0c + cmpd #0x0d ;10 83 00 0d + cmps *0x0e ;11 9c*0e + cmpu #0x0f ;11 83 00 0f + cmpx *0x10 ;9c*10 + cmpy #0x11 ;10 8C 00 11 + com ,x ;63 84 + coma ;43 + comb ;53 + cwai #0x12 ;3c 12 + daa ;19 + dec ,x ;6a 84 + deca ;4a + decb ;5a + eora #0x13 ;88 13 + eorb *0x14 ;d8*14 + exg a,b ;1e 89 + inc ,x ;6c 84 + inca ;4c + incb ;5c + jmp .+0x13,pcr ;6e 8c 10 + jsr .+0x13,pcr ;ad 8c 10 + lbcc .+0x14 ;10 24 00 10 + lbcs .+0x14 ;10 25 00 10 + lbeq .+0x14 ;10 27 00 10 + lbge .+0x14 ;10 2c 00 10 + lbgt .+0x14 ;10 2e 00 10 + lbhi .+0x14 ;10 22 00 10 + lbhis .+0x14 ;10 24 00 10 + lbhs .+0x14 ;10 24 00 10 + lble .+0x14 ;10 2f 00 10 + lblo .+0x14 ;10 25 00 10 + lblos .+0x14 ;10 23 00 10 + lbls .+0x14 ;10 23 00 10 + lblt .+0x14 ;10 2d 00 10 + lbmi .+0x14 ;10 2b 00 10 + lbne .+0x14 ;10 26 00 10 + lbpl .+0x14 ;10 2a 00 10 + lbra .+0x13 ;16 00 10 + lbrn .+0x14 ;10 21 00 10 + lbsr .+0x13 ;17 00 10 + lbvc .+0x14 ;10 28 00 10 + lbvs .+0x14 ;10 29 00 10 + lda #0x15 ;86 15 + ldaa *0x16 ;96*16 + ldab #0x17 ;c6 17 + ldb *0x18 ;d6*18 + ldd #0x19 ;cc 00 19 + lds *0x1a ;10 de*1a + ldu #0x1b ;ce 00 1b + ldx *0x1c ;9e*1c + ldy #0x1d ;10 8e 00 1d + leas -1,s ;32 7f + leau -1,u ;33 5f + leax -1,x ;30 1f + leay -1,y ;31 3f + lsl ,x ;68 84 + lsla ;48 + lslb ;58 + lsr ,x ;64 84 + lsra ;44 + lsrb ;54 + mul ;3d + neg ,x ;60 84 + nega ;40 + negb ;50 + nop ;12 + ora *0x1e ;9a*1e + oraa #0x1f ;8a 1f + orab *0x20 ;da*20 + orb #0x21 ;ca 21 + orcc #0x22 ;1a 22 + pshs a ;34 02 + pshu b ;36 04 + puls x ;35 10 + pulu y ;37 20 + rol ,x ;69 84 + rola ;49 + rolb ;59 + ror ,x ;66 84 + rora ;46 + rorb ;56 + rti ;3b + rts ;39 + sbca #0x23 ;82 23 + sbcb *0x24 ;d2*24 + sex ;1d + sta ,x ;a7 84 + staa ,x ;a7 84 + stab ,x ;e7 84 + stb ,x ;e7 84 + std ,x ;ed 84 + sts ,x ;10 ef 84 + stu ,x ;ef 84 + stx ,x ;af 84 + sty ,x ;10 af 84 + suba #0x25 ;80 25 + subb *0x26 ;d0*26 + subd #0x27 ;83 00 27 + swi ;3f + swi1 ;3f + swi2 ;10 3f + swi3 ;11 3f + sync ;13 + tfr x,y ;1f 12 + tst ,x ;6d 84 + tsta ;4d + tstb ;5d + + + .page + .sbttl Post Byte Addressing Test (numerical constants) + + neg 0,x ;60 00 + neg 1,x ;60 01 + neg 2,x ;60 02 + neg 3,x ;60 03 + neg 4,x ;60 04 + neg 5,x ;60 05 + neg 6,x ;60 06 + neg 7,x ;60 07 + neg 8,x ;60 08 + neg 9,x ;60 09 + neg 10,x ;60 0A + neg 11,x ;60 0B + neg 12,x ;60 0C + neg 13,x ;60 0D + neg 14,x ;60 0E + neg 15,x ;60 0F + neg -16,x ;60 10 + neg -15,x ;60 11 + neg -14,x ;60 12 + neg -13,x ;60 13 + neg -12,x ;60 14 + neg -11,x ;60 15 + neg -10,x ;60 16 + neg -9,x ;60 17 + neg -8,x ;60 18 + neg -7,x ;60 19 + neg -6,x ;60 1A + neg -5,x ;60 1B + neg -4,x ;60 1C + neg -3,x ;60 1D + neg -2,x ;60 1E + neg -1,x ;60 1F + + neg 0,y ;60 20 + neg 1,y ;60 21 + neg 2,y ;60 22 + neg 3,y ;60 23 + neg 4,y ;60 24 + neg 5,y ;60 25 + neg 6,y ;60 26 + neg 7,y ;60 27 + neg 8,y ;60 28 + neg 9,y ;60 29 + neg 10,y ;60 2A + neg 11,y ;60 2B + neg 12,y ;60 2C + neg 13,y ;60 2D + neg 14,y ;60 2E + neg 15,y ;60 2F + neg -16,y ;60 30 + neg -15,y ;60 31 + neg -14,y ;60 32 + neg -13,y ;60 33 + neg -12,y ;60 34 + neg -11,y ;60 35 + neg -10,y ;60 36 + neg -9,y ;60 37 + neg -8,y ;60 38 + neg -7,y ;60 39 + neg -6,y ;60 3A + neg -5,y ;60 3B + neg -4,y ;60 3C + neg -3,y ;60 3D + neg -2,y ;60 3E + neg -1,y ;60 3F + + neg 0,u ;60 40 + neg 1,u ;60 41 + neg 2,u ;60 42 + neg 3,u ;60 43 + neg 4,u ;60 44 + neg 5,u ;60 45 + neg 6,u ;60 46 + neg 7,u ;60 47 + neg 8,u ;60 48 + neg 9,u ;60 49 + neg 10,u ;60 4A + neg 11,u ;60 4B + neg 12,u ;60 4C + neg 13,u ;60 4D + neg 14,u ;60 4E + neg 15,u ;60 4F + neg -16,u ;60 50 + neg -15,u ;60 51 + neg -14,u ;60 52 + neg -13,u ;60 53 + neg -12,u ;60 54 + neg -11,u ;60 55 + neg -10,u ;60 56 + neg -9,u ;60 57 + neg -8,u ;60 58 + neg -7,u ;60 59 + neg -6,u ;60 5A + neg -5,u ;60 5B + neg -4,u ;60 5C + neg -3,u ;60 5D + neg -2,u ;60 5E + neg -1,u ;60 5F + + neg 0,s ;60 60 + neg 1,s ;60 61 + neg 2,s ;60 62 + neg 3,s ;60 63 + neg 4,s ;60 64 + neg 5,s ;60 65 + neg 6,s ;60 66 + neg 7,s ;60 67 + neg 8,s ;60 68 + neg 9,s ;60 69 + neg 10,s ;60 6A + neg 11,s ;60 6B + neg 12,s ;60 6C + neg 13,s ;60 6D + neg 14,s ;60 6E + neg 15,s ;60 6F + neg -16,s ;60 70 + neg -15,s ;60 71 + neg -14,s ;60 72 + neg -13,s ;60 73 + neg -12,s ;60 74 + neg -11,s ;60 75 + neg -10,s ;60 76 + neg -9,s ;60 77 + neg -8,s ;60 78 + neg -7,s ;60 79 + neg -6,s ;60 7A + neg -5,s ;60 7B + neg -4,s ;60 7C + neg -3,s ;60 7D + neg -2,s ;60 7E + neg -1,s ;60 7F + + neg ,x+ ;60 80 + neg ,x++ ;60 81 + neg ,-x ;60 82 + neg ,--x ;60 83 + neg ,x ;60 84 + neg b,x ;60 85 + neg a,x ;60 86 + neg 0x11,x ;60 88 11 + neg 0x2233,x ;60 89 22 33 + neg d,x ;60 8b + neg .+0x13,pcr ;60 8c 10 + neg .+0x1004,pcr ;60 8d 10 00 +; neg [,x+] ;illegal + neg [,x++] ;60 91 +; neg [,-x] ;illegal + neg [,--x] ;60 93 + neg [,x] ;60 94 + neg [b,x] ;60 95 + neg [a,x] ;60 96 + neg [0x11,x] ;60 98 11 + neg [0x2233,x] ;60 99 22 33 + neg [d,x] ;60 9b + neg [.+0x13,pcr] ;60 9c 10 + neg [.+0x1004,pcr] ;60 9d 10 00 + neg [0x2233] ;60 9f 22 33 + + neg ,y+ ;60 a0 + neg ,y++ ;60 a1 + neg ,-y ;60 a2 + neg ,--y ;60 a3 + neg ,y ;60 a4 + neg b,y ;60 a5 + neg a,y ;60 a6 + neg 0x11,y ;60 a8 11 + neg 0x2233,y ;60 a9 22 33 + neg d,y ;60 ab +; neg .+0x13,pcr ;60 ac 10 +; neg .+0x1004,pcr ;60 ad 10 00 +; neg [,y+] ;illegal + neg [,y++] ;60 b1 +; neg [,-y] ;illegal + neg [,--y] ;60 b3 + neg [,y] ;60 b4 + neg [b,y] ;60 b5 + neg [a,y] ;60 b6 + neg [0x11,y] ;60 b8 11 + neg [0x2233,y] ;60 b9 22 33 + neg [d,x] ;60 9b +; neg [.+0x13,pcr] ;60 bc 10 +; neg [.+0x1004,pcr] ;60 bd 10 00 +; neg [0x2233] ;60 bf 22 33 + + neg ,u+ ;60 c0 + neg ,u++ ;60 c1 + neg ,-u ;60 c2 + neg ,--u ;60 c3 + neg ,u ;60 c4 + neg b,u ;60 c5 + neg a,u ;60 c6 + neg 0x11,u ;60 c8 11 + neg 0x2233,u ;60 c9 22 33 + neg d,u ;60 cb +; neg .+0x13,pcr ;60 cc 10 +; neg .+0x1004,pcr ;60 cd 10 00 +; neg [,u+] ;illegal + neg [,u++] ;60 d1 +; neg [,-u] ;illegal + neg [,--u] ;60 d3 + neg [,u] ;60 d4 + neg [b,u] ;60 d5 + neg [a,u] ;60 d6 + neg [0x11,u] ;60 d8 11 + neg [0x2233,u] ;60 d9 22 33 + neg [d,u] ;60 db +; neg [.+0x13,pcr] ;60 dc 10 +; neg [.+0x1004,pcr] ;60 dd 10 00 +; neg [0x2233] ;60 df 22 33 + + neg ,s+ ;60 e0 + neg ,s++ ;60 e1 + neg ,-s ;60 e2 + neg ,--s ;60 e3 + neg ,s ;60 e4 + neg b,s ;60 e5 + neg a,s ;60 e6 + neg 0x11,s ;60 e8 11 + neg 0x2233,s ;60 e9 22 33 + neg d,s ;60 eb +; neg .+0x13,pcr ;60 ec 10 +; neg .+0x1004,pcr ;60 ed 10 00 +; neg [,s+] ;illegal + neg [,s++] ;60 f1 +; neg [,-s] ;illegal + neg [,--s] ;60 f3 + neg [,s] ;60 f4 + neg [b,s] ;60 f5 + neg [a,s] ;60 f6 + neg [0x11,s] ;60 f8 11 + neg [0x2233,s] ;60 f9 22 33 + neg [d,s] ;60 fb +; neg [.+0x13,pcr] ;60 fc 10 +; neg [.+0x1004,pcr] ;60 fd 10 00 +; neg [0x2233] ;60 ff 22 33 + + + + .page + .sbttl Post Byte Addressing Test (post defined constants) + + + neg num0,x ;60 00 + neg num1,x ;60 01 + neg num2,x ;60 02 + neg num3,x ;60 03 + neg num4,x ;60 04 + neg num5,x ;60 05 + neg num6,x ;60 06 + neg num7,x ;60 07 + neg num8,x ;60 08 + neg num9,x ;60 09 + neg num10,x ;60 0A + neg num11,x ;60 0B + neg num12,x ;60 0C + neg num13,x ;60 0D + neg num14,x ;60 0E + neg num15,x ;60 0F + neg -num16,x ;60 10 + neg -num15,x ;60 11 + neg -num14,x ;60 12 + neg -num13,x ;60 13 + neg -num12,x ;60 14 + neg -num11,x ;60 15 + neg -num10,x ;60 16 + neg -num9,x ;60 17 + neg -num8,x ;60 18 + neg -num7,x ;60 19 + neg -num6,x ;60 1A + neg -num5,x ;60 1B + neg -num4,x ;60 1C + neg -num3,x ;60 1D + neg -num2,x ;60 1E + neg -num1,x ;60 1F + + neg num0,y ;60 20 + neg num1,y ;60 21 + neg num2,y ;60 22 + neg num3,y ;60 23 + neg num4,y ;60 24 + neg num5,y ;60 25 + neg num6,y ;60 26 + neg num7,y ;60 27 + neg num8,y ;60 28 + neg num9,y ;60 29 + neg num10,y ;60 2A + neg num11,y ;60 2B + neg num12,y ;60 2C + neg num13,y ;60 2D + neg num14,y ;60 2E + neg num15,y ;60 2F + neg -num16,y ;60 30 + neg -num15,y ;60 31 + neg -num14,y ;60 32 + neg -num13,y ;60 33 + neg -num12,y ;60 34 + neg -num11,y ;60 35 + neg -num10,y ;60 36 + neg -num9,y ;60 37 + neg -num8,y ;60 38 + neg -num7,y ;60 39 + neg -num6,y ;60 3A + neg -num5,y ;60 3B + neg -num4,y ;60 3C + neg -num3,y ;60 3D + neg -num2,y ;60 3E + neg -num1,y ;60 3F + + neg num0,u ;60 40 + neg num1,u ;60 41 + neg num2,u ;60 42 + neg num3,u ;60 43 + neg num4,u ;60 44 + neg num5,u ;60 45 + neg num6,u ;60 46 + neg num7,u ;60 47 + neg num8,u ;60 48 + neg num9,u ;60 49 + neg num10,u ;60 4A + neg num11,u ;60 4B + neg num12,u ;60 4C + neg num13,u ;60 4D + neg num14,u ;60 4E + neg num15,u ;60 4F + neg -num16,u ;60 50 + neg -num15,u ;60 51 + neg -num14,u ;60 52 + neg -num13,u ;60 53 + neg -num12,u ;60 54 + neg -num11,u ;60 55 + neg -num10,u ;60 56 + neg -num9,u ;60 57 + neg -num8,u ;60 58 + neg -num7,u ;60 59 + neg -num6,u ;60 5A + neg -num5,u ;60 5B + neg -num4,u ;60 5C + neg -num3,u ;60 5D + neg -num2,u ;60 5E + neg -num1,u ;60 5F + + neg num0,s ;60 60 + neg num1,s ;60 61 + neg num2,s ;60 62 + neg num3,s ;60 63 + neg num4,s ;60 64 + neg num5,s ;60 65 + neg num6,s ;60 66 + neg num7,s ;60 67 + neg num8,s ;60 68 + neg num9,s ;60 69 + neg num10,s ;60 6A + neg num11,s ;60 6B + neg num12,s ;60 6C + neg num13,s ;60 6D + neg num14,s ;60 6E + neg num15,s ;60 6F + neg -num16,s ;60 70 + neg -num15,s ;60 71 + neg -num14,s ;60 72 + neg -num13,s ;60 73 + neg -num12,s ;60 74 + neg -num11,s ;60 75 + neg -num10,s ;60 76 + neg -num9,s ;60 77 + neg -num8,s ;60 78 + neg -num7,s ;60 79 + neg -num6,s ;60 7A + neg -num5,s ;60 7B + neg -num4,s ;60 7C + neg -num3,s ;60 7D + neg -num2,s ;60 7E + neg -num1,s ;60 7F + + neg ,x+ ;60 80 + neg ,x++ ;60 81 + neg ,-x ;60 82 + neg ,--x ;60 83 + neg ,x ;60 84 + neg b,x ;60 85 + neg a,x ;60 86 + neg nn,x ;60 88 11 + neg mmnn,x ;60 89 22 33 + neg d,x ;60 8b + neg .+0x13,pcr ;60 8c 10 + neg .+0x1004,pcr ;60 8d 10 00 +; neg [,x+] ;illegal + neg [,x++] ;60 91 +; neg [,-x] ;illegal + neg [,--x] ;60 93 + neg [,x] ;60 94 + neg [b,x] ;60 95 + neg [a,x] ;60 96 + neg [nn,x] ;60 98 11 + neg [mmnn,x] ;60 99 22 33 + neg [d,x] ;60 9b + neg [.+0x13,pcr] ;60 9c 10 + neg [.+0x1004,pcr] ;60 9d 10 00 + neg [mmnn] ;60 9f 22 33 + + neg ,y+ ;60 a0 + neg ,y++ ;60 a1 + neg ,-y ;60 a2 + neg ,--y ;60 a3 + neg ,y ;60 a4 + neg b,y ;60 a5 + neg a,y ;60 a6 + neg nn,y ;60 a8 11 + neg mmnn,y ;60 a9 22 33 + neg d,y ;60 ab +; neg .+0x13,pcr ;60 ac 10 +; neg .+0x1004,pcr ;60 ad 10 00 +; neg [,y+] ;illegal + neg [,y++] ;60 b1 +; neg [,-y] ;illegal + neg [,--y] ;60 b3 + neg [,y] ;60 b4 + neg [b,y] ;60 b5 + neg [a,y] ;60 b6 + neg [nn,y] ;60 b8 11 + neg [mmnn,y] ;60 b9 22 33 + neg [d,x] ;60 9b +; neg [.+0x13,pcr] ;60 bc 10 +; neg [.+0x1004,pcr] ;60 bd 10 00 +; neg [mmnn] ;60 bf 22 33 + + neg ,u+ ;60 c0 + neg ,u++ ;60 c1 + neg ,-u ;60 c2 + neg ,--u ;60 c3 + neg ,u ;60 c4 + neg b,u ;60 c5 + neg a,u ;60 c6 + neg nn,u ;60 c8 11 + neg mmnn,u ;60 c9 22 33 + neg d,u ;60 cb +; neg .+0x13,pcr ;60 cc 10 +; neg .+0x1004,pcr ;60 cd 10 00 +; neg [,u+] ;illegal + neg [,u++] ;60 d1 +; neg [,-u] ;illegal + neg [,--u] ;60 d3 + neg [,u] ;60 d4 + neg [b,u] ;60 d5 + neg [a,u] ;60 d6 + neg [nn,u] ;60 d8 11 + neg [mmnn,u] ;60 d9 22 33 + neg [d,u] ;60 db +; neg [.+0x13,pcr] ;60 dc 10 +; neg [.+0x1004,pcr] ;60 dd 10 00 +; neg [mmnn] ;60 df 22 33 + + neg ,s+ ;60 e0 + neg ,s++ ;60 e1 + neg ,-s ;60 e2 + neg ,--s ;60 e3 + neg ,s ;60 e4 + neg b,s ;60 e5 + neg a,s ;60 e6 + neg nn,s ;60 e8 11 + neg mmnn,s ;60 e9 22 33 + neg d,s ;60 eb +; neg .+0x13,pcr ;60 ec 10 +; neg .+0x1004,pcr ;60 ed 10 00 +; neg [,s+] ;illegal + neg [,s++] ;60 f1 +; neg [,-s] ;illegal + neg [,--s] ;60 f3 + neg [,s] ;60 f4 + neg [b,s] ;60 f5 + neg [a,s] ;60 f6 + neg [nn,s] ;60 f8 11 + neg [mmnn,s] ;60 f9 22 33 + neg [d,s] ;60 fb +; neg [.+0x13,pcr] ;60 fc 10 +; neg [.+0x1004,pcr] ;60 fd 10 00 +; neg [mmnn] ;60 ff 22 33 + + + + .page + .sbttl Defined constants + + nn = 0x11 + mmnn = 0x2233 + + num0 = 0 + num1 = 1 + num2 = 2 + num3 = 3 + num4 = 4 + num5 = 5 + num6 = 6 + num7 = 7 + num8 = 8 + num9 = 9 + num10 = 10 + num11 = 11 + num12 = 12 + num13 = 13 + num14 = 14 + num15 = 15 + num16 = 16 + + + + .page + .sbttl Post Byte Addressing Test (predefined constants) + + neg num0,x ;60 00 + neg num1,x ;60 01 + neg num2,x ;60 02 + neg num3,x ;60 03 + neg num4,x ;60 04 + neg num5,x ;60 05 + neg num6,x ;60 06 + neg num7,x ;60 07 + neg num8,x ;60 08 + neg num9,x ;60 09 + neg num10,x ;60 0A + neg num11,x ;60 0B + neg num12,x ;60 0C + neg num13,x ;60 0D + neg num14,x ;60 0E + neg num15,x ;60 0F + neg -num16,x ;60 10 + neg -num15,x ;60 11 + neg -num14,x ;60 12 + neg -num13,x ;60 13 + neg -num12,x ;60 14 + neg -num11,x ;60 15 + neg -num10,x ;60 16 + neg -num9,x ;60 17 + neg -num8,x ;60 18 + neg -num7,x ;60 19 + neg -num6,x ;60 1A + neg -num5,x ;60 1B + neg -num4,x ;60 1C + neg -num3,x ;60 1D + neg -num2,x ;60 1E + neg -num1,x ;60 1F + + neg num0,y ;60 20 + neg num1,y ;60 21 + neg num2,y ;60 22 + neg num3,y ;60 23 + neg num4,y ;60 24 + neg num5,y ;60 25 + neg num6,y ;60 26 + neg num7,y ;60 27 + neg num8,y ;60 28 + neg num9,y ;60 29 + neg num10,y ;60 2A + neg num11,y ;60 2B + neg num12,y ;60 2C + neg num13,y ;60 2D + neg num14,y ;60 2E + neg num15,y ;60 2F + neg -num16,y ;60 30 + neg -num15,y ;60 31 + neg -num14,y ;60 32 + neg -num13,y ;60 33 + neg -num12,y ;60 34 + neg -num11,y ;60 35 + neg -num10,y ;60 36 + neg -num9,y ;60 37 + neg -num8,y ;60 38 + neg -num7,y ;60 39 + neg -num6,y ;60 3A + neg -num5,y ;60 3B + neg -num4,y ;60 3C + neg -num3,y ;60 3D + neg -num2,y ;60 3E + neg -num1,y ;60 3F + + neg num0,u ;60 40 + neg num1,u ;60 41 + neg num2,u ;60 42 + neg num3,u ;60 43 + neg num4,u ;60 44 + neg num5,u ;60 45 + neg num6,u ;60 46 + neg num7,u ;60 47 + neg num8,u ;60 48 + neg num9,u ;60 49 + neg num10,u ;60 4A + neg num11,u ;60 4B + neg num12,u ;60 4C + neg num13,u ;60 4D + neg num14,u ;60 4E + neg num15,u ;60 4F + neg -num16,u ;60 50 + neg -num15,u ;60 51 + neg -num14,u ;60 52 + neg -num13,u ;60 53 + neg -num12,u ;60 54 + neg -num11,u ;60 55 + neg -num10,u ;60 56 + neg -num9,u ;60 57 + neg -num8,u ;60 58 + neg -num7,u ;60 59 + neg -num6,u ;60 5A + neg -num5,u ;60 5B + neg -num4,u ;60 5C + neg -num3,u ;60 5D + neg -num2,u ;60 5E + neg -num1,u ;60 5F + + neg num0,s ;60 60 + neg num1,s ;60 61 + neg num2,s ;60 62 + neg num3,s ;60 63 + neg num4,s ;60 64 + neg num5,s ;60 65 + neg num6,s ;60 66 + neg num7,s ;60 67 + neg num8,s ;60 68 + neg num9,s ;60 69 + neg num10,s ;60 6A + neg num11,s ;60 6B + neg num12,s ;60 6C + neg num13,s ;60 6D + neg num14,s ;60 6E + neg num15,s ;60 6F + neg -num16,s ;60 70 + neg -num15,s ;60 71 + neg -num14,s ;60 72 + neg -num13,s ;60 73 + neg -num12,s ;60 74 + neg -num11,s ;60 75 + neg -num10,s ;60 76 + neg -num9,s ;60 77 + neg -num8,s ;60 78 + neg -num7,s ;60 79 + neg -num6,s ;60 7A + neg -num5,s ;60 7B + neg -num4,s ;60 7C + neg -num3,s ;60 7D + neg -num2,s ;60 7E + neg -num1,s ;60 7F + + neg ,x+ ;60 80 + neg ,x++ ;60 81 + neg ,-x ;60 82 + neg ,--x ;60 83 + neg ,x ;60 84 + neg b,x ;60 85 + neg a,x ;60 86 + neg nn,x ;60 88 11 + neg mmnn,x ;60 89 22 33 + neg d,x ;60 8b + neg .+0x13,pcr ;60 8c 10 + neg .+0x1004,pcr ;60 8d 10 00 +; neg [,x+] ;illegal + neg [,x++] ;60 91 +; neg [,-x] ;illegal + neg [,--x] ;60 93 + neg [,x] ;60 94 + neg [b,x] ;60 95 + neg [a,x] ;60 96 + neg [nn,x] ;60 98 11 + neg [mmnn,x] ;60 99 22 33 + neg [d,x] ;60 9b + neg [.+0x13,pcr] ;60 9c 10 + neg [.+0x1004,pcr] ;60 9d 10 00 + neg [mmnn] ;60 9f 22 33 + + neg ,y+ ;60 a0 + neg ,y++ ;60 a1 + neg ,-y ;60 a2 + neg ,--y ;60 a3 + neg ,y ;60 a4 + neg b,y ;60 a5 + neg a,y ;60 a6 + neg nn,y ;60 a8 11 + neg mmnn,y ;60 a9 22 33 + neg d,y ;60 ab +; neg .+0x13,pcr ;60 ac 10 10 +; neg .+0x1004,pcr ;60 ad 10 00 +; neg [,y+] ;illegal + neg [,y++] ;60 b1 +; neg [,-y] ;illegal + neg [,--y] ;60 b3 + neg [,y] ;60 b4 + neg [b,y] ;60 b5 + neg [a,y] ;60 b6 + neg [nn,y] ;60 b8 11 + neg [mmnn,y] ;60 b9 22 33 + neg [d,x] ;60 9b +; neg [.+0x13,pcr] ;60 bc 10 +; neg [.+0x1004,pcr] ;60 bd 10 00 +; neg [mmnn] ;60 bf 22 33 + + neg ,u+ ;60 c0 + neg ,u++ ;60 c1 + neg ,-u ;60 c2 + neg ,--u ;60 c3 + neg ,u ;60 c4 + neg b,u ;60 c5 + neg a,u ;60 c6 + neg nn,u ;60 c8 11 + neg mmnn,u ;60 c9 22 33 + neg d,u ;60 cb +; neg .+0x13,pcr ;60 cc 10 +; neg .+0x1004,pcr ;60 cd 10 00 +; neg [,u+] ;illegal + neg [,u++] ;60 d1 +; neg [,-u] ;illegal + neg [,--u] ;60 d3 + neg [,u] ;60 d4 + neg [b,u] ;60 d5 + neg [a,u] ;60 d6 + neg [nn,u] ;60 d8 11 + neg [mmnn,u] ;60 d9 22 33 + neg [d,u] ;60 db +; neg [.+0x13,pcr] ;60 dc 10 +; neg [.+0x1004,pcr] ;60 dd 10 00 +; neg [mmnn] ;60 df 22 33 + + neg ,s+ ;60 e0 + neg ,s++ ;60 e1 + neg ,-s ;60 e2 + neg ,--s ;60 e3 + neg ,s ;60 e4 + neg b,s ;60 e5 + neg a,s ;60 e6 + neg nn,s ;60 e8 11 + neg mmnn,s ;60 e9 22 33 + neg d,s ;60 eb +; neg .+0x13,pcr ;60 ec 10 +; neg .+0x1004,pcr ;60 ed 10 00 +; neg [,s+] ;illegal + neg [,s++] ;60 f1 +; neg [,-s] ;illegal + neg [,--s] ;60 f3 + neg [,s] ;60 f4 + neg [b,s] ;60 f5 + neg [a,s] ;60 f6 + neg [nn,s] ;60 f8 11 + neg [mmnn,s] ;60 f9 22 33 + neg [d,s] ;60 fb +; neg [.+0x13,pcr] ;60 fc 10 +; neg [.+0x1004,pcr] ;60 fd 10 00 +; neg [mmnn] ;60 ff 22 33 + + + + .page + .sbttl push/pull instructions + + + pshu cc ;36 01 + pshu cc,a ;36 03 + pshu cc,a,b ;36 07 + pshu cc,a,b,dp ;36 0f + pshu cc,a,b,dp,x ;36 1f + pshu cc,a,b,dp,x,y ;36 3f + pshu cc,a,b,dp,x,y,s ;36 7f + pshu cc,a,b,dp,x,y,s,pc ;36 ff + + pshs cc ;34 01 + pshs cc,a ;34 03 + pshs cc,a,b ;34 07 + pshs cc,a,b,dp ;34 0f + pshs cc,a,b,dp,x ;34 1f + pshs cc,a,b,dp,x,y ;34 3f + pshs cc,a,b,dp,x,y,u ;34 7f + pshs cc,a,b,dp,x,y,u,pc ;34 ff + + pulu cc ;37 01 + pulu cc,a ;37 03 + pulu cc,a,b ;37 07 + pulu cc,a,b,dp ;37 0f + pulu cc,a,b,dp,x ;37 1f + pulu cc,a,b,dp,x,y ;37 3f + pulu cc,a,b,dp,x,y,s ;37 7f + pulu cc,a,b,dp,x,y,s,pc ;37 ff + + puls cc ;35 01 + puls cc,a ;35 03 + puls cc,a,b ;35 07 + puls cc,a,b,dp ;35 0f + puls cc,a,b,dp,x ;35 1f + puls cc,a,b,dp,x,y ;35 3f + puls cc,a,b,dp,x,y,u ;35 7f + puls cc,a,b,dp,x,y,u,pc ;35 ff + + + .page + .sbttl 6800 compatibility instuctions with 6809 equivalents + + aba ;34 04 ab e0 + pshs b ;34 04 + adda ,s+ ;ab e0 + + cba ;34 04 a1 e0 + pshs b ;34 04 + cmpa ,s+ ;a1 e0 + + clc ;1c fe + andcc #0xFE ;1c fe + + cli ;1c ef + andcc #0xEF ;1c ef + + clv ;1c fd + andcc #0xFD ;1c fd + + des ;32 7f + leas -1,s ;32 7f + + dex ;30 1f + leax -1,x ;30 1f + + ins ;32 61 + leas 1,s ;32 61 + + inx ;30 01 + leax 1,x ;30 01 + + psha ;34 02 + pshs a ;34 02 + + pshb ;34 04 + pshs b ;34 04 + + pula ;35 02 + puls a ;35 02 + + pulb ;35 04 + puls b ;35 04 + + sba ;34 04 a0 e0 + pshs b ;34 04 + suba ,s+ ;a0 e0 + + sec ;1a 01 + orcc #0x01 ;1a 01 + + sei ;1a 10 + orcc #0x10 ;1a 10 + + sev ;1a 02 + orcc #0x02 ;1a 02 + + tab ;1f 89 4d + tfr a,b ;1f 89 + tsta ;4d + + tap ;1f 8a + tfr a,cc ;1f 8a + + tba ;1f 98 5d + tfr b,a ;1f 98 + tstb ;5d + + tpa ;1f a8 + tfr cc,a ;1f a8 + + tsx ;1f 41 + tfr s,x ;1f 41 + + txs ;1f 14 + tfr x,s ;1f 14 + + wai ;3c ff + cwai #0xFF ;3c ff + + diff --git a/as-4.1.0/as6809/t6809e.asm b/as-4.1.0/as6809/t6809e.asm new file mode 100644 index 0000000..8ed5200 --- /dev/null +++ b/as-4.1.0/as6809/t6809e.asm @@ -0,0 +1,142 @@ + .title 6809 Error Tests + + ;a errors reported at assembly time + ;*L errors reported at LINK time + ; + ;ASLINK -C + ;-XMS + ;T6809E + ;-B DATA = 0x100 + ;-B ROM = 0x400 + ;-E + ; + + .blkb 0d256 ;.area _CODE + + .area DATA + + .globl dat0,dat255,dat256 + +dat0: .byte 4 + .blkb 254 +dat255: .byte 5 +dat256: .byte 6 + + .area ROM + + .globl rom0,rom255,rom256 + +rom0: .byte 1 + .blkb 254 +rom255: .byte 2 +rom256: .byte 3 + + .sbttl S_ACC Tests + + .area PROGRAM + + .setdp 0,_CODE + + mmnn = 0x2233 + + adda #0x01 ; 8b 01 + adda *0x02 ; 9b 02 + adda mmnn ; bb 22 33 + adda ,x ; ab 84 + adda [mmnn] ; ab 9f 22 33 + + addb #0x01 ; cb 01 + addb *0x02 ; db 02 + addb mmnn ; fb 22 33 + addb ,x ; eb 84 + addb [mmnn] ; eb 9f 22 33 + + + .sbttl S_SOP Tests + + clr #0x01 ;a + clr *0x02 ; 0f 02 + clr mmnn ; 7f 22 33 + clr ,x ; 6f 84 + clr [mmnn] ; 6f 9f 22 33 + + + .sbttl S_LR Tests + + cmpx #0x01 ; 8c 00 01 + cmpx *0x02 ; 9c 02 + cmpx mmnn ; bc 22 33 + cmpx ,x ; ac 84 + cmpx [mmnn] ; ac 9f 22 33 + + + .sbttl S_STR Tests + + stx #0x01 ;a + stx *0x02 ; 9f 02 + stx mmnn ; bf 22 33 + stx ,x ; af 84 + stx [mmnn] ; af 9f 22 33 + + + .sbttl S_LEA Tests + + leax #0x01 ;a + leax *0x02 ;a + leax mmnn ;a + leax ,x ; 30 84 + leax [mmnn] ; 30 9f 22 33 + + + .page + .sbttl Direct Addressing Tests + + ;*L == Error reported at LINK time !!! + + neg *0x20 ;00 20 + + .setdp 0,ROM + + neg *rom0 ; 00 00 + neg *rom255 ; 00 ff + + neg *rom256 ;*L 00 00 + neg *dat0 ;*L 00 00 + neg *dat255 ;*L 00 ff + neg *dat256 ;*L 00 00 + + .setdp 0,DATA + + neg *rom0 ;*L 00 00 + neg *rom255 ;*L 00 ff + neg *rom256 ;*L 00 00 + + neg *dat0 ; 00 00 + neg *dat255 ; 00 ff + neg *dat256 ;*L 00 00 + + .setdp 0,_CODE + + neg *rom0 ;*L 00 00 + neg *rom255 ;*L 00 ff + neg *rom256 ;*L 00 00 + + neg *dat0 ;*L 00 00 + neg *dat255 ;*L 00 ff + neg *dat256 ;*L 00 00 + + + .sbttl PC and PCR mode checks + + .globl extern + + num = 0x7f + ext = 0x80 + + adda 0x17,pc ; ab 8c 17 + neg num,pc ; 60 8c 7f + tst ext,pc ; 6d 8d 00 80 + tst ext,pcr ; 6d 8c (0x80 - . - 3) + adda a0,pc ;a + neg extern,pc ;a +a0: diff --git a/as-4.1.0/as6809/t6809l.asm b/as-4.1.0/as6809/t6809l.asm new file mode 100644 index 0000000..02fb57c --- /dev/null +++ b/as-4.1.0/as6809/t6809l.asm @@ -0,0 +1,107 @@ + .sbttl Assembler Link Tests + + .module t6809l + + ; This file and TCONST.ASM should be assembled and linked. + ; + ; AS6809 -XGOL T6809L + ; AS6809 -XGOL TCONST + ; + ; ASLINK -C + ; -XMS + ; T6809L + ; TCONST + ; -E + ; + ; The following tests verify the correct processing of + ; external references for the direct page, index mode offsets, + ; and branches. + ; + ; *L signifies an error will be reported at link time. + + ; branch test must be first + + .area TEST (ABS,OVR) + + .blkb 0x7E ;bra1: + bra bra1 ; 20 00 [20 80] + .blkb 0x7F ;bra2: + bra bra2 ;*L 20 00 [20 7F] + bra bra3 ; 20 00 [20 7F] + .blkb 0x7F + .blkb 0x00 ;bra3: + bra bra4 ;*L 20 00 [20 [80] + .blkb 0x80 + .blkb 0x00 ;bra4: + + .blkb 0x7E ;bra5: + bra bra5 ; 20 00 [20 80] + .blkb 0x7F ;bra6: + bra bra6 ;*L 20 00 [20 7F] + bra bra7 ; 20 00 [20 7F] + .blkb 0x7F + .blkb 0x00 ;bra7: + bra bra8 ;*L 20 00 [20 [80] + .blkb 0x80 + .blkb 0x00 ;bra8: + + ; direct page test + + .area DIRECT (ABS,OVR) + .setdp 0,DIRECT + + lda *minus1 ;*L 96 00 [96 FF] + lda *zero ; 96 00 [96 00] + lda *two55 ; 96 00 [96 FF] + lda *two56 ;*L 96 00 [96 00] + + lda *lminus1 ;*L 96 00 [96 FF] + lda *lzero ; 96 00 [96 00] + lda *ltwo55 ; 96 00 [96 FF] + lda *ltwo56 ;*L 96 00 [96 00] + + ; indexed test + + lda minus1,x ; A6 89 00 00 [A6 89 FF FF] + lda zero,x ; A6 89 00 00 [A6 89 00 00] + lda two55,x ; A6 89 00 00 [A6 89 00 FF] + lda two56,x ; A6 89 00 00 [A6 89 01 00] + + ; direct page boundary / length checking + + .area A + + .blkb 1 + + .area PAGE0 (PAG) ;*L Linker -- page boundary error + + .setdp 0,PAGE0 ;*L Linker -- page definition boundary error + + .blkb 0x101 ;*L Linker -- page length error + + .area PAGE1 (ABS,OVR) + + .setdp 0x100,PAGE1 + + .setdp boundary,PAGE1 ;*L Linker -- page definition boundary error + + ; Non page '0' paging + + .area PAGE2 (ABS,OVR) + + .setdp 0,PAGE2 + + lda *minus1 ;*L 96 00 [96 FF] + lda *zero ; 96 00 [96 00] + lda *two55 ; 96 00 [96 FF] + lda *two56 ;*L 96 00 [96 00] + + .setdp 0x100,PAGE2 + + lda *minus1 ;*L 96 00 [96 FF] + lda *zero ;*L 96 00 [96 00] + lda *two55 ;*L 96 00 [96 FF] + lda *two56 ; 96 00 [96 00] + lda *five11 ; 96 00 [96 FF] + lda *five12 ;*L 96 00 [96 00] + diff --git a/as-4.1.0/as6809/tconst.asm b/as-4.1.0/as6809/tconst.asm new file mode 100644 index 0000000..c8f254b --- /dev/null +++ b/as-4.1.0/as6809/tconst.asm @@ -0,0 +1,68 @@ + .title Assembler Link Test Constants + + .module tconst + + .area TEST (ABS,OVR) + + bra1 == 0 ; branching constants + bra2 == 0x80 + bra3 == 0x182 + bra4 == 0x204 + + .blkb 0x7E ;bra1: + .blkb 0x02 + .blkb 0x7F ;bra2: + .blkb 0x02 + .blkb 0x02 + .blkb 0x7F + .blkb 0x00 ;bra3: + .blkb 0x02 + .blkb 0x80 + .blkb 0x00 ;bra4: + + .globl bra5,bra6,bra7,bra8 + + ; branching labels +bra5: .blkb 0x7E ;bra5: + .blkb 0x02 +bra6: .blkb 0x7F ;bra6: + .blkb 0x02 + .blkb 0x02 + .blkb 0x7F +bra7: .blkb 0x00 ;bra7: + .blkb 0x02 + .blkb 0x80 +bra8: .blkb 0x00 ;bra8: + + + ; 12-Bit numbers are considered valid if: + ; 1) the most significant 4 bits of the 16-bit number are zero + ; 2) the most significant 4 bits of the 16-bit number are all ones + + n0FFF == 0x0FFF ;largest positive + n1000 == 0x1000 ;+1 + + nF000 == 0xF000 ;largest negative + nEFFF == 0xEFFF ;-1 + + + .area DIRECT (ABS,OVR) + .setdp + + boundary == 0x101 + + minus1 == -1 ; paging / indexing constants + zero == 0 + two55 == 0d255 + two56 == 0d256 + five11 == 0d511 + five12 == 0d512 + + + .globl lzero,ltwo55,ltwo56,lminus1 + +lzero: .blkb 0x00FF ; paging labels +ltwo55: .blkb 0x0001 +ltwo56: .blkb 0xFEFF +lminus1:.blkb 0d0000 + diff --git a/as-4.1.0/asxdoc/abstra.txt b/as-4.1.0/asxdoc/abstra.txt new file mode 100644 index 0000000..4814068 --- /dev/null +++ b/as-4.1.0/asxdoc/abstra.txt @@ -0,0 +1,62 @@ + + + ASxxxx Cross Assemblers, Version 4.10, January 2006 + + Submitted by Alan R. Baldwin, + Kent State University, Kent, Ohio + + Operating System: Linux, Windows, MS-DOS + or other supporting ANSI C. + + Source Langauge: C + + Abstract: + + The ASxxxx assemblers are a series of microprocessor assem- + blers written in the C programming language. This collection + contains cross assemblers for the 1802, S2650, MPS430, 61860, + 6500, 6800(6802/6808), 6801(hd6303), 6804, 6805, 68HC(S)08, + 6809, 68HC11, 68HC(S)12, 68HC16, 740, 8051, 8085(8080), AVR, + DS8xCxxx, ez80, F2MC8L/FX, GameBoy(Z80), H8/3xx, PIC, Rabbit + 2000/3000, z8, and z80(hd64180) series microprocessors. Each + assembler has a device specific section which includes: (1) + device description, byte order, and file extension information, + (2) a table of assembler general directives, special directives, + assembler mnemonics and associated operation codes, (3) machine + specific code for processing the device mnemonics, addressing + modes, and special directives. + + The assemblers have a common device independent section which + handles the details of file input/output, symbol table genera- + tion, program/data areas, expression analysis, and assembler + directive processing. + + The assemblers provide the following features: (1) alpha- + betized, formatted symbol table listings, (2) relocatable object + modules, (3) global symbols for linking object modules, (4) con- + ditional assembly directives, (5) reusable local symbols, and + (6) include-file processing. + + The companion program ASLINK is a relocating linker perform- + ing the following functions: (1) bind multiple object modules + into a single memory image, (2) resolve inter-module symbol + references, (3) resolve undefined symbols from specified + librarys of object modules, (4) process absolute, relative, con- + catenated, and overlay attributes in data and program sections, + (5) perform byte and word program-counter relative (pc or pcr) + addressing calculations, (6) define absolute symbol values at + link time, (7) define absolute area base address values at link + time, (8) produce an Intel Hex record, Motorola S record or + Tandy CoCo Disk Basic output file, (9) produce a map of the + linked memory image, and (10) update the ASxxxx assembler list- + ing files with the absolute linked addresses and data. + + The assemblers and linker have been tested using Linux, + DJGPP, Cygwin, Symantec C/C++ V7.2, Borland Turbo C++ 3.0 and + VC6 with MS-DOS/Windows 3.x/9x/NT/2000/XP. Complete source code + and documentation for the assemblers and linker is included with + the distribution. Additionally, test code for each assembler + and several microprocessor monitors ( ASSIST05 for the 6805, + MONDEB and ASSIST09 for the 6809, and BUFFALO 2.5 for the 6811) + are included as working examples of use of these assemblers. + \ No newline at end of file diff --git a/as-4.1.0/asxdoc/asmlnk.txt b/as-4.1.0/asxdoc/asmlnk.txt new file mode 100644 index 0000000..9855bab --- /dev/null +++ b/as-4.1.0/asxdoc/asmlnk.txt @@ -0,0 +1,15129 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + ASxxxx Assemblers + + + and + + + ASLINK Relocating Linker + + + + + Version 4.10 + January 2006 + + + Page 2 + + + + + P R E F A C E + + + + + + The ASxxxx assemblers were written following the style of + several cross assemblers found in the Digital Equipment Corpora- + tion Users Society (DECUS) distribution of the C programming + language. The DECUS code was provided with no documentation as + to the input syntax or the output format. Study of the code + revealed that the unknown author of the code had attempted to + formulate an assembler with attributes similiar to those of the + PDP-11 MACRO assembler (without macro's). The incomplete code + from the DECUS C distribution has been largely rewritten, only + the program structure, and C source file organization remains + relatively unchanged. However, I wish to thank the author for + his contribution to this set of assemblers. + + The ASLINK program was written as a companion to the ASxxxx + assemblers, its design and implementation was not derived from + any other work. + + I would greatly appreciate receiving the details of any + changes, additions, or errors pertaining to these programs and + will attempt to incorporate any fixes or generally useful + changes in a future update to these programs. + + + + Alan R. Baldwin + Kent State University + Physics Department + Kent, Ohio 44242 + U.S.A. + + + http://shop-pdp.kent.edu/ashtml/asxxxx.htm + + baldwin@kent.edu + baldwin@shop-pdp.kent.edu + tel: (330) 672 2531 + fax: (330) 672 2959 + + + Page 3 + + + + + E N D U S E R L I C E N S E A G R E E M E N T + + + + + + This software is FREEWARE which means it is NOT public domain + but fully copyrighted material that is distributed freely + without money. Its electronic distribution through BBSs, the + Internet, or other such means is encouraged provided no money is + requested in return. + + It is forbidden to distribute this software should this file, + or any of the remaining files, change in any way or be omitted + from the archive. + + If you would like to include this software together with your + own work you MUST include it only as the original complete un- + modified archive in which I distribute it and not as independent + files. If uncertain, simply point others or link to: + http://shop-pdp.kent.edu/asxhtm/asxxxx.htm + + Please note that although I have done my best to ensure there + is no potentially dangerous code (or accidental virus infec- + tions), the nature of programming is such that it forces me to + provide absolutely no warranty, express or implied, with this + version of the software, and I bear no responsibility for what- + ever damages, direct or consequential, you may suffer from its + use. I definitely do not warrant this software for suitability + for any particular purpose, either. It is also possible that + the instructions, the extra utilities, or the examples that come + with the software contain errors, none of which were inten- + tional. + + + Page 4 + + + + + + + + + C O N T R I B U T O R S + + + + Thanks to Marko Makela for his contribution of the AS6500 cross + assembler. + + Marko Makela + Sillitie 10 A + 01480 Vantaa + Finland + Internet: Marko dot Makela at Helsinki dot Fi + EARN/BitNet: msmakela at finuh + + + + + Thanks to John Hartman for his contribution of the AS8051 cross + assembler and updates to the ASxxxx and ASLINK internals. + + John L. Hartman + jhartman at compuserve dot com + noice at noicedebugger dot com + + + + + Thanks to G. Osborn for his contributions to LKS19.C and + LKIHX.C. + + G. Osborn + gary at s-4 dot com + + + + + Thanks to Ken Hornstein for his contribution of object libraries + contained in LKLIBR.C. + + Ken Hornstein + kenh at cmf dot nrl dot navy dot mil + + + + + + + Page 5 + + + + Thanks to Bill McKinnon for his contributions to the AS8XCXXX + cross assembler for the DS8XCXXX series of microprocessors. + + Bill McKinnon + w_mckinnon at conknet dot com + + + + + Thanks to Roger Ivie for his contribution of the ASGB cross as- + sembler for the GameBoy. + + Roger Ivie + ivie at cc dot usu dot edu + + + + + Thanks to Uwe Steller for his contribution of the AS740 cross + assembler. + + Uwe Stellar + Uwe dot Steller at t-online dot de + + + + + Thanks to Shujen Chen for his contribution of the AS1802 cross + assembler. + + Shugen Chen + DeVry University + Tinley Park IL + schen at tp dot devry dot edu + + + + + Thanks to Edgar Puehringer for his contribution of the AS61860 + cross assembler. + + Edgar Puehringer + edgar_pue at yahoo dot com + + + + + + + Page 6 + + + + Thanks to Ulrich Raich and Razaq Ijoduola for their contribution + of the ASRAB cross assembler. + + Ulrich Raich and Razaq Ijoduola + PS Division + CERN + CH-1211 Geneva-23 + Ulrich dot Raich at cern dot ch + + + + + Thanks to Patrick Head for his contribution of the ASEZ80 cross + assembler. + + Patrick Head + patrick at phead dot net + + + + + Thanks to Boisy G. Pitre for contributing the .ifeq, .ifne, + .ifgt, .iflt, .ifle, and .ifge conditional directives and the + Tandy Color Computer Disk Basic binary output for ASLINK. + + Boisy G. Pitre + boisy at boisypitre dot com + + + + + Thanks to Mike McCarty for his contributions to the processor + cycle count option of the ASxxxx Assemblers. + + Mike McCarty + mike dot mccarty at sbcglobal dot net + + + Page 7 + + + + ASxxxx Cross Assemblers, Version 4.10, January 2006 + + Submitted by Alan R. Baldwin, + Kent State University, Kent, Ohio + + Operating System: Linux, Windows, MS-DOS + or other supporting ANSI C. + + Source Langauge: C + + Abstract: + + The ASxxxx assemblers are a series of microprocessor assem- + blers written in the C programming language. This collection + contains cross assemblers for the 1802, S2650, MPS430, 61860, + 6500, 6800(6802/6808), 6801(hd6303), 6804, 6805, 68HC(S)08, + 6809, 68HC11, 68HC(S)12, 68HC16, 740, 8051, 8085(8080), AVR, + DS8xCxxx, ez80, F2MC8L/FX, GameBoy(Z80), H8/3xx, PIC, Rabbit + 2000/3000, z8, and z80(hd64180) series microprocessors. Each + assembler has a device specific section which includes: (1) + device description, byte order, and file extension information, + (2) a table of assembler general directives, special directives, + assembler mnemonics and associated operation codes, (3) machine + specific code for processing the device mnemonics, addressing + modes, and special directives. + + The assemblers have a common device independent section which + handles the details of file input/output, symbol table genera- + tion, program/data areas, expression analysis, and assembler + directive processing. + + The assemblers provide the following features: (1) alpha- + betized, formatted symbol table listings, (2) relocatable object + modules, (3) global symbols for linking object modules, (4) con- + ditional assembly directives, (5) reusable local symbols, and + (6) include-file processing. + + The companion program ASLINK is a relocating linker perform- + ing the following functions: (1) bind multiple object modules + into a single memory image, (2) resolve inter-module symbol + references, (3) resolve undefined symbols from specified + librarys of object modules, (4) process absolute, relative, con- + catenated, and overlay attributes in data and program sections, + (5) perform byte and word program-counter relative (pc or pcr) + addressing calculations, (6) define absolute symbol values at + link time, (7) define absolute area base address values at link + time, (8) produce an Intel Hex record, Motorola S record or + Tandy CoCo Disk Basic output file, (9) produce a map of the + linked memory image, and (10) update the ASxxxx assembler list- + ing files with the absolute linked addresses and data. + + The assemblers and linker have been tested using Linux, + DJGPP, Cygwin, Symantec C/C++ V7.2, Borland Turbo C++ 3.0 and + VC6 with MS-DOS/Windows 3.x/9x/NT/2000/XP. Complete source code + and documentation for the assemblers and linker is included with + the distribution. Additionally, test code for each assembler + and several microprocessor monitors ( ASSIST05 for the 6805, + + + Page 8 + + + + MONDEB and ASSIST09 for the 6809, and BUFFALO 2.5 for the 6811) + are included as working examples of use of these assemblers. + + + CHAPTER 1 THE ASSEMBLER 1-1 + 1.1 THE ASXXXX ASSEMBLERS 1-1 + 1.1.1 Assembly Pass 1 1-2 + 1.1.2 Assembly Pass 2 1-2 + 1.1.3 Assembly Pass 3 1-2 + 1.2 SOURCE PROGRAM FORMAT 1-3 + 1.2.1 Statement Format 1-3 + 1.2.1.1 Label Field 1-3 + 1.2.1.2 Operator Field 1-5 + 1.2.1.3 Operand Field 1-5 + 1.2.1.4 Comment Field 1-6 + 1.3 SYMBOLS AND EXPRESSIONS 1-6 + 1.3.1 Character Set 1-6 + 1.3.2 User-Defined Symbols 1-10 + 1.3.3 Reusable Symbols 1-10 + 1.3.4 Current Location Counter 1-12 + 1.3.5 Numbers 1-13 + 1.3.6 Terms 1-14 + 1.3.7 Expressions 1-14 + 1.4 GENERAL ASSEMBLER DIRECTIVES 1-16 + 1.4.1 .module Directive 1-16 + 1.4.2 .title Directive 1-16 + 1.4.3 .sbttl Directive 1-17 + 1.4.4 .page Directive 1-17 + 1.4.5 .msg Directive 1-17 + 1.4.6 .error Directive 1-18 + 1.4.7 .byte, .db, and .fcb Directives 1-18 + 1.4.8 .word, .dw, and .fdb Directives 1-19 + 1.4.9 .3byte and .triple Directives 1-19 + 1.4.10 .4byte and .quad Directive 1-20 + 1.4.11 .blkb, .ds, ,rmb, and .rs Directives 1-20 + 1.4.12 .blkw, .blk3, and .blk4 Directives 1-20 + 1.4.13 .ascii, .str, and .fcc Directives 1-21 + 1.4.14 .ascis and .strs Directives 1-21 + 1.4.15 .asciz and .strz Directives 1-22 + 1.4.16 .assume Directive 1-22 + 1.4.17 .radix Directive 1-23 + 1.4.18 .even Directive 1-23 + 1.4.19 .odd Directive 1-23 + 1.4.20 .area Directive 1-24 + 1.4.21 .bank Directive 1-26 + 1.4.22 .org Directive 1-27 + 1.4.23 .globl Directive 1-28 + 1.4.24 .local Directive 1-29 + 1.4.25 .equ, .gblequ, and .lclequ Directives 1-30 + 1.4.26 .if, .else, and .endif Directives 1-30 + 1.4.27 .ifxx, .else, and .endif Directives 1-31 + 1.4.28 .ifdef, .else, and .endif Directives 1-32 + 1.4.29 .ifndef, .else, and .endif Directives 1-33 + 1.4.30 .include Directive 1-34 + 1.4.31 .define and .undefine Directives 1-35 + 1.4.32 .setdp Directive 1-35 + 1.4.33 .16bit, .24bit, and .32bit Directives 1-37 + 1.4.34 .msb Directive 1-38 + 1.4.35 .end Directive 1-38 + 1.5 INVOKING ASXXXX 1-40 + + + Page ii + + + + 1.6 ERRORS 1-42 + 1.7 LISTING FILE 1-43 + 1.8 SYMBOL TABLE FILE 1-45 + 1.9 OBJECT FILE 1-46 + + CHAPTER 2 THE LINKER 2-1 + 2.1 ASLINK RELOCATING LINKER 2-1 + 2.2 INVOKING ASLINK 2-2 + 2.3 LIBRARY PATH(S) AND FILE(S) 2-5 + 2.4 ASLINK PROCESSING 2-6 + 2.5 ASXXXX VERSION 4.XX LINKING 2-8 + 2.5.1 Object Module Format 2-8 + 2.5.2 Header Line 2-9 + 2.5.3 Module Line 2-9 + 2.5.4 Merge Mode Line 2-9 + 2.5.5 Bank Line 2-10 + 2.5.6 Area Line 2-10 + 2.5.7 Symbol Line 2-10 + 2.5.8 T Line 2-11 + 2.5.9 R Line 2-11 + 2.5.10 P Line 2-12 + 2.5.11 24-Bit and 32-Bit Addressing 2-12 + 2.5.12 ASlink V4.xx Error Messages 2-13 + 2.6 ASXXXX VERSION 3.XX LINKING 2-15 + 2.6.1 Object Module Format 2-15 + 2.6.2 Header Line 2-15 + 2.6.3 Module Line 2-16 + 2.6.4 Area Line 2-16 + 2.6.5 Symbol Line 2-16 + 2.6.6 T Line 2-16 + 2.6.7 R Line 2-17 + 2.6.8 P Line 2-17 + 2.6.9 24-Bit and 32-Bit Addressing 2-18 + 2.6.10 ASlink V3.xx Error Messages 2-18 + 2.7 INTEL IHX OUTPUT FORMAT (16-BIT) 2-21 + 2.8 INTEL I86 OUTPUT FORMAT (24 OR 32-BIT) 2-22 + 2.9 MOTORLA S1-S9 OUTPUT FORMAT (16-BIT) 2-23 + 2.10 MOTORLA S2-S8 OUTPUT FORMAT (24-BIT) 2-24 + 2.11 MOTORLA S3-S7 OUTPUT FORMAT (32-BIT) 2-25 + 2.12 TANDY COLOR COMPUTER DISK BASIC FORMAT 2-26 + + CHAPTER 3 BUILDING ASXXXX AND ASLINK 3-1 + 3.1 BUILDING ASXXXX AND ASLINK WITH LINUX 3-2 + 3.2 BUILDING ASXXXX AND ASLINK UNDER CYGWIN 3-2 + 3.3 BUILDING ASXXXX AND ASLINK WITH DJGPP 3-3 + 3.4 BUILDING ASXXXX AND ASLINK WITH MS VISUAL C++ + 6.0 3-3 + 3.4.1 Graphical User Interface 3-3 + 3.4.2 Command Line Interface 3-4 + 3.5 BUILDING ASXXXX AND ASLINK WITH BORLAND'S + TURBO C++ 3.0 3-4 + 3.5.1 Graphical User Interface 3-5 + + + Page iii + + + + 3.5.2 Command Line Interface 3-5 + 3.6 BUILDING ASXXXX AND ASLINK WITH SYMANTEC C/C++ + V7.2 3-6 + 3.6.1 Graphical User Interface 3-6 + 3.6.2 Command Line Interface 3-6 + + APPENDIX A ASXSCN LISTING FILE SCANNER A-1 + + APPENDIX B ASXCNV LISTING CONVERTER B-1 + + APPENDIX C ASCHECK ASSEMBLER C-1 + C.1 .opcode DIRECTIVE C-1 + + APPENDIX D CHANGE LOG D-1 + + APPENDIX AA AS1802 ASSEMBLER AA-1 + AA.1 ACKNOWLEDGMENT AA-1 + AA.2 1802 REGISTER SET AA-1 + AA.3 1802 INSTRUCTION SET AA-1 + AA.3.1 1802 Inherent Instructions AA-2 + AA.3.2 1802 Short Branch Instructions AA-2 + AA.3.3 1802 Long Branch Instructions AA-3 + AA.3.4 1802 Immediate Instructions AA-3 + AA.3.5 1802 Register Instructions AA-3 + AA.3.6 1802 Input and Output Instructions AA-3 + AA.3.7 CDP1802 COSMAC Microprocessor Instruction + Set Summary AA-4 + + APPENDIX AB AS2650 ASSEMBLER AB-1 + AB.1 2650 REGISTER SET AB-1 + AB.2 2650 INSTRUCTION SET AB-1 + AB.2.1 Load / Store Instructions AB-2 + AB.2.2 Arithmetic / Compare Instructions AB-2 + AB.2.3 Logical / Rotate Instructions AB-2 + AB.2.4 Condition Code Branches AB-3 + AB.2.5 Register Test Branches AB-3 + AB.2.6 Branches (to Subroutines) / Returns AB-3 + AB.2.7 Input / Output AB-3 + AB.2.8 Miscellaneos AB-3 + AB.2.9 Program Status AB-4 + + APPENDIX AC AS430 ASSEMBLER AC-1 + AC.1 MPS430 REGISTER SET AC-1 + AC.2 MPS430 ADDRESSING MODES AC-2 + AC.2.1 MPS430 Instruction Mnemonics AC-3 + + APPENDIX AD AS61860 ASSEMBLER AD-1 + AD.1 ACKNOWLEDGMENT AD-1 + AD.2 61860 REGISTER SET AD-1 + AD.3 PROCESSOR SPECIFIC DIRECTIVES AD-2 + AD.4 61860 INSTRUCTION SET AD-2 + AD.4.1 Load Immediate Register AD-3 + + + Page iv + + + + AD.4.2 Load Accumulator AD-3 + AD.4.3 Store Accumulator AD-3 + AD.4.4 Move Data AD-3 + AD.4.5 Exchange Data AD-4 + AD.4.6 Stack Operations AD-4 + AD.4.7 Block Move Data AD-4 + AD.4.8 Block Exchange Data AD-4 + AD.4.9 Increment and Decrement AD-5 + AD.4.10 Increment/Decrement with Load/Store AD-5 + AD.4.11 Fill AD-5 + AD.4.12 Addition and Subtraction AD-6 + AD.4.13 Shift Operations AD-6 + AD.4.14 Boolean Operations AD-6 + AD.4.15 Compare AD-7 + AD.4.16 CPU Control AD-7 + AD.4.17 Absolute Jumps AD-7 + AD.4.18 Relative Jumps AD-8 + AD.4.19 Calls AD-8 + AD.4.20 Input and output AD-8 + AD.4.21 Unknown Commands AD-9 + + APPENDIX AE AS6500 ASSEMBLER AE-1 + AE.1 ACKNOWLEDGMENT AE-1 + AE.2 6500